SCDS435 September   2021 TMUX8108 , TMUX8109


  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1  Absolute Maximum Ratings: TMUX810x Devices
    2. 6.2  ESD Ratings
    3. 6.3  Thermal Information: TMUX810x
    4. 6.4  Recommended Operating Conditions: TMUX810x Devices
    5. 6.5  Electrical Characteristics (Global): TMUX810x Devices
    6. 6.6  Electrical Characteristics (±36-V Dual Supply)
    7. 6.7  Electrical Characteristics (72-V Single Supply)
    8. 6.8  Electrical Characteristics (100-V Single Supply)
    9. 6.9  Switching Characteristics: TMUX810x Devices
    10. 6.10 Typical Characteristics
  7. Parameter Measurement Information
    1. 7.1  Truth Tables
    2. 7.2  On-Resistance
    3. 7.3  Off-Leakage Current
    4. 7.4  On-Leakage Current
    5. 7.5  Break-Before-Make Delay
    6. 7.6  Enable Delay Time
      1. 7.6.1 Device Turn On Time
    7. 7.7  Transition Time
    8. 7.8  Charge Injection
    9. 7.9  Off Isolation
    10. 7.10 Crosstalk
    11. 7.11 Bandwidth
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Flat On - Resistance
      2. 8.3.2 Protection Features
        1. Fail-Safe Logic
        2. Latch-up Immunity
      3. 8.3.3 Bidirectional Operation
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
    1. 13.1 Tape and Reel Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detailed Design Procedure

The multiplexed data aquistion circuit allows the system designer to have flexibility over both size and cost of the end product. Utilizing a multiplexer can reduce board size and cost by reducing the number of op amp circuits required for a multi-channel design. Additionally, the high voltage multiplexer can be paired with many implementations of high voltage level translation circuits such as difference amplifiers, instrumentation amplifiers, or fully differential amplifiers depending on the gain, noise requirements, and cost targets of the system.

In the example application, the TMUX8109 is paired with a difference amplifier and buffer stage op amps on both the positive and negative differential signals. Many data aquistion systems will place a buffer op amp following the mux for two reasons. The first reason is to eliminate the impact of the multiplexer on-resistance change across the signal range, preventing gain errors in the system. Secondly, depening on the output impedance of the sensors being interfaced, a high input impedance stage may be required to achieve system specification targets. The TMUX810x multiplexers have exceptionally flat on-resistance and low leakge currents across the signal voltage range and can potentially eliminate the need for buffer stage op amps depending on system requirements. Additionally, excellent crosstalk and off-isolation performance, paired with low capacitance ratings makes the TMUX810x multiplexers very flexible for system design of data aqusition systems.

A difference amplifier stage follows the multiplexer to eliminate the common mode voltage shift and can be used to scale the input signals to match the dynamic range of the selected ADC. In this example, both the op amp and multipexer are rated for performance up to ±50 V. To find the maximum common mode voltage shift allowed the system designer should take the maximum supply voltage and subtract the maximum voltage of the differential signal, the resulting voltage is the maximum common mode shift that can be accomodated without exceding the input voltage requirements of the multiplexer. The difference amplifier circuit relies on matched resistor for good CMRR performance and typically has lower voltage gains as well as lower input impedances. If higher gains are required, or for better CMRR performance, an instrumentation amplifier can be swapped into the circuit. Both op amp solutions can be utilized to remove the common mode voltage offset and extract the true differential signal. The high voltage multiplexer at the front end of the design requires the system to have high voltage power supply rails to pass signals within VSS and VDD, this should be considered in the overal architecture of the system design. This multiplexed application becomes increasingly valuable with larger number of input channels by greatly redcution component count.