SCDS482A February   2025  – April 2025 TMUX8612

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings: TMUX861x Devices
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions: TMUX861x Devices
    4. 6.4  Source of Drain Continuous Current
    5. 6.5  Source of Drain Pulse Current
    6. 6.6  Thermal Information
    7. 6.7  Electrical Characteristics (Global): TMUX861x Devices
    8. 6.8  Electrical Characteristics (±15V Dual Supply)
    9. 6.9  Electrical Characteristics (±36V Dual Supply)
    10. 6.10 Electrical Characteristics (±50V Dual Supply)
    11. 6.11 Electrical Characteristics (72V Single Supply)
    12. 6.12 Electrical Characteristics (100V Single Supply)
    13. 6.13 Switching Characteristics: TMUX861x Devices
    14. 6.14 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 On-Resistance
    2. 7.2 Off-Leakage Current
    3. 7.3 On-Leakage Current
    4. 7.4 Device Turn-On and Turn-Off Time
    5. 7.5 Charge Injection
    6. 7.6 Off Isolation
    7. 7.7 Crosstalk
    8. 7.8 Bandwidth
    9. 7.9 THD + Noise
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Bidirectional Operation
      2. 8.3.2 Flat On-Resistance
      3. 8.3.3 Protection Features
        1. 8.3.3.1 Fail-Safe Logic
        2. 8.3.3.2 ESD Protection
        3. 8.3.3.3 Latch-Up Immunity
      4. 8.3.4 1.8V Logic Compatible Inputs
      5. 8.3.5 Integrated Pull-Down Resistor on Logic Pins
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Mode
      2. 8.4.2 Truth Tables
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.2 Truth Tables

Table 8-1 shows the truth table for the TMUX8612.

Table 8-1 TMUX8612 Truth Table
SEL #(1)CHANNEL #
0Channel # OFF
1Channel # ON
(1) "#"designates the channel number controlled by SEL pin: "1, 2, 3, or 4"

If unused, then the SELx pins must be tied to GND or Logic High so that the devices do not consume additional current as highlighted in Implications of Slow or Floating CMOS Inputs. Unused signal path inputs (Sx or Dx) should be connected to GND for best performance.