SLLSEU8B
March 2017 – May 2020
TPD2S703-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
USB 2.0 Port With Short-to-Battery and IEC ESD Protection
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings—AEC Specification
6.3
ESD Ratings—IEC Specification
6.4
ESD Ratings—ISO Specification
6.5
Recommended Operating Conditions
6.6
Thermal Information
6.7
Electrical Characteristics
6.8
Power Supply and Supply Current Consumption Chracteristics
6.9
Timing Requirements
6.10
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
OVP Operation
8.3.2
OVP Threshold
8.3.3
D± Clamping Voltage
8.4
Device Functional Modes
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.1.1
Device Operation
9.2.2
Detailed Design Procedure
9.2.2.1
Common choke and Inductor for VD+ and VD-
9.2.2.2
VREF Operation
9.2.2.2.1
Mode 0
9.2.2.2.2
Mode 1
9.2.2.3
Mode 1 Enable Timing
9.2.3
Application Curves
10
Power Supply Recommendations
10.1
VPWR Path
10.2
VREF Pin
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DSK|10
MPDS326A
DGS|10
MPDS035C
Thermal pad, mechanical data (Package|Pins)
DSK|10
QFND148E
Orderable Information
sllseu8b_oa
sllseu8b_pm
6.3
ESD Ratings—IEC Specification
VALUE
UNIT
V
(ESD)
Electrostatic discharge
IEC 61000-4-2 contact discharge
VD+, VD– pins
(1)
±8000
V
IEC 61000-4-2 air-gap discharge
VD+, VD– pins
(1)
±15000
(1)
See
Figure 20
for details on system level ESD testing setup.