SLVSH72A December   2023  – September 2024 TPS281C100

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Options
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SNS Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Device Functional Modes
    4. 8.4 Working Mode
    5. 8.5 Feature Description
      1. 8.5.1 Accurate Current Sense
        1. 8.5.1.1 High Accuracy Sense Mode
      2. 8.5.2 Programmable Current Limit
        1. 8.5.2.1 Short-Circuit and Overload Protection
        2. 8.5.2.2 Capacitive Charging
      3. 8.5.3 Inductive-Load Switching-Off Clamp
      4. 8.5.4 Inductive Load Demagnetization
      5. 8.5.5 Full Protections and Diagnostics
        1. 8.5.5.1 Open-Load Detection
        2. 8.5.5.2 Thermal Protection Behavior
        3. 8.5.5.3 Undervoltage Lockout (UVLO) Protection
        4. 8.5.5.4 Reverse Polarity Protection
        5. 8.5.5.5 Protection for MCU I/Os
        6. 8.5.5.6 Diagnostic Enable Function
        7. 8.5.5.7 Loss of Ground
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 IEC 61000-4-4 EFT
        2. 9.2.1.2 IEC 61000-4-5 Surge
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selecting RILIM
        2. 9.2.2.2 Selecting RSNS
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 EMC Considerations
      2. 9.4.2 Layout Example
        1. 9.4.2.1 PWP Layout Without a GND Network
        2. 9.4.2.2 PWP Layout With a GND Network
        3. 9.4.2.3 DNT Layout Without a GND Network
      3. 9.4.3 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DNT|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.4.1 Layout Guidelines

To prevent thermal shutdown, TJ must be less than 125°C. If the output current is very high, the power dissipation may be large. The HTSSOP and WSON packages have good thermal impedance. However, the PCB layout is very important. Good PCB design can optimize heat transfer, which is absolutely essential for the long-term reliability of the device.

  • Maximize the copper coverage on the PCB to increase the thermal conductivity of the board. The major heat-flow path from the package to the ambient is through the copper on the PCB. Maximum copper is extremely important when there are not any heat sinks attached to the PCB on the other side of the board opposite the package.
  • Add as many thermal vias as possible directly under the package ground pad to optimize the thermal conductivity of the board.
  • All thermal vias should either be plated shut or plugged and capped on both sides of the board to prevent solder voids. To ensure reliability and performance, the solder coverage should be at least 85%.