SLVS950I July 2009 – May 2018 TPS65070 , TPS65072 , TPS65073 , TPS650731 , TPS650732
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
DEFDCDC1 | B7 | B6 | B5 | B4 | B3 | B2 | B1 | BO |
---|---|---|---|---|---|---|---|---|
Bit name and function | DCDC1
extadj |
DCDC1[5] | DCDC1[4] | DCDC1[3] | DCDC1[2] | DCDC1[1] | DCDC1[0] | |
Default for –70, –72 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 1 |
Default for –73, –731, –732 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 |
Default value loaded by: | UVLO | UVLO | UVLO | UVLO | UVLO | UVLO | UVLO | UVLO |
Read/write | R/W | R | R/W | R/W | R/W | R/W | R/W | R/W |
DEFDCDC1 sets the output voltage for the DCDC1 converter. Per default the converter is internally fixed but can be programmed to an externally adjustable version by setting Bit 7 (Ext adj). The default setting is defined in an EEPROM Bit. In case the externally adjustable version is programmed, the external resistor divider need to be connected to the VDCDC1 pin, otherwise this pin needs to be connected to the output voltage directly. For the fixed voltage version, the output voltage is set with Bits B0 to B5 (DCDC1[5] to DCDC1[0]):
All step-down converters provide the same output voltage range, see DEFDCDC3_LOW. Register Address: 13h.