SLDS234B December 2017 – September 2018 TPS65218D0
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
SLEW is shown in Figure 5-54 and described in Table 5-26.
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NOTE
Slew-rate control applies to DCDC1 and DCDC2 only. If changing from a higher voltage to lower voltage while STRICT = 1 and converters are in a no load state, PFM bit for DCDC1 and DCDC2 must be set to 0.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
GO | GODSBL | RESERVED | SLEW | ||||
R/W-0b | R/W-0b | R-0h | R/W-6h |