SLDS234B December 2017 – September 2018 TPS65218D0
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
Register mask: C0h
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Freshness seal (FSEAL) status. Note: See Section 5.6.2 for details.
0b = FSEAL is in native state (fresh)
1b = FSEAL is broken
0b = EEPROM values have not been changed from factory default setting
1b = EEPROM values have been changed from factory default settings
AC_DET input status bit
0b = AC_DET input is inactive (AC_DET input pin is high)
1b = AC_DET input is active (AC_DET input is low)
PB input status bit
0b = Push Button input is inactive (PB input pin is high)
1b = Push Button input is active (PB input pin is low)
State machine STATE indication
0h = PMIC is in transitional state
1h = PMIC is in WAIT_PWR_EN state
2h = PMIC is in ACTIVE state
3h = PMIC is in SUSPEND state
Coin cell state of charge. Note: Coin-cell voltage acquisition must be triggered first before status bits are valid. See CC_AQ bit in Section 188.8.131.52.
0h = VCC < VLOW_LEVEL; Coin cell is not present or approaching end-of-life (EOL)
1h = VLOW_LEVEL < VCC < VGOOD_LEVEL; Coin cell voltage is LOW.
2h = VGOOD_LEVEL < VCC <VIDEAL_LEVEL; Coin cell voltage is GOOD.
3h = VIDEAL < VCC; Coin cell voltage is IDEAL.