SBVS054K November   2004  – June 2025 TPS730

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Undervoltage Lockout (UVLO)
      2. 6.3.2 Shutdown
      3. 6.3.3 Foldback Current Limit
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
      3. 6.4.3 Disabled
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Adjustable Operation
      2. 7.1.2 Capacitor Recommendations
      3. 7.1.3 Input and Output Capacitor Requirements
      4. 7.1.4 Noise-Reduction and Feed-Forward Capacitor Requirements
      5. 7.1.5 Reverse Current Operation
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Board Layout Recommendations to Improve PSRR and Noise Performance
        2. 7.5.1.2 Thermal Considerations
        3. 7.5.1.3 Power Dissipation
      2. 7.5.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 Receiving Notification of Documentation Updates
    4. 8.4 Support Resources
    5. 8.5 Trademarks
    6. 8.6 Electrostatic Discharge Caution
    7. 8.7 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 TPS730YZQ Nanostar™ Wafer Chip Scale Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.1.5 Reverse Current Operation

The TPS730 legacy chip PMOS-pass transistor has a built-in back diode that conducts reverse current when the input voltage drops below the output voltage (for example, during power-down). Current is conducted from the output to the input and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might be appropriate. If extended reverse voltage operation in anticipated, external limiting to 5% of the rated output current is recommended.

The TPS793 new chip, as with most modern LDOs, excessive reverse current can damage this device.

Reverse current flows through the body diode on the pass element instead of the normal conducting channel. At high magnitudes, this current flow degrades the long-term reliability of the device as a result of one of the following conditions:

  • Degradation caused by electromigration
  • Excessive heat dissipation
  • Potential for a latch-up condition

Conditions where reverse current can occur are outlined in this section, all of which can exceed the absolute maximum rating of VOUT > VIN + 0.3 V:

  • If the device has a large COUT and the input supply collapses with little or no load current
  • The output is biased when the input supply is not established
  • The output is biased above the input supply

If reverse current flow is expected in the application, external protection must be used to protect the device. Figure 7-2 shows one approach of protecting the device.

TPS730 Example Circuit for Reverse Current Protection Using a Schottky Diode Figure 7-2 Example Circuit for Reverse Current Protection Using a Schottky Diode