SBVS370F May   2019  – September 2025 TPS7B81-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Device Enable (EN)
      2. 6.3.2 Undervoltage Shutdown
      3. 6.3.3 Current Limit
      4. 6.3.4 Thermal Shutdown
    4. 6.4 Device Functional Modes
      1. 6.4.1 Operation With VIN Lower Than 3V
      2. 6.4.2 Operation With VIN Larger Than 3V
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 Power Dissipation
        1. 7.1.1.1 Estimating Junction Temperature
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input Capacitor
        2. 7.2.2.2 Output Capacitor
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Device Nomenclature
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

4 Pin Configuration and Functions

TPS7B81-Q1 DGN Package, 8-Pin HVSSOP PowerPAD (Top View)Figure 4-1 DGN Package, 8-Pin HVSSOP PowerPAD™ (Top View)
TPS7B81-Q1 DRV Package, 6-Pin WSON PowerPAD (Top View)Figure 4-2 DRV Package, 6-Pin WSON PowerPAD™ (Top View)
TPS7B81-Q1 KVU Package, 5-Pin TO-252 (Top View) Figure 4-3 KVU Package, 5-Pin TO-252 (Top View)
Table 4-1 Pin Functions
PIN TYPE DESCRIPTION
NAME NO.
DGN DRV KVU
DNC — 5 4 — Do not connect to a biased voltage. Tie this pin to ground or leave floating.
EN 2 2 2 I Enable input pin. Drive EN greater than VIH to turn on the regulator. Drive EN less than VIL to put the low-dropout (LDO) into shutdown mode.
GND 4, 5, 6 3,4 3, TAB — Ground reference
IN 1 1 1 I Input power-supply pin. For best transient response and to minimize input impedance, use the recommended value or larger ceramic capacitor from IN to ground as listed in the Recommended Operating Conditions table and the Input Capacitor section. Place the input capacitor as close to the output of the device as possible.
NC 3, 7 — — — Not internally connected
OUT 8 6 5 O Regulated output voltage pin. A capacitor is required from OUT to ground for stability. For best transient response, use the nominal recommended value or larger ceramic capacitor from OUT to ground; see the Recommended Operating Conditions table and the Output Capacitor section. Place the output capacitor as close to output of the device as possible.
Thermal pad — Connect the thermal pad to a large-area GND plane for improved thermal performance.