SLLSF73C February 2018 – September 2019 TS3USBCA4
PRODUCTION DATA.
Table 6 lists the memory-mapped registers for the TS3USBCA4 registers. All register offset addresses not listed in Table 6 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
9h | Revision_ID | Revsion ID | Go |
Ah | General_1 | Enable and FLIPSEL control | Go |
Bh | General_2 | SWSEL control | Go |
Complex bit access types are encoded to fit into small table cells. Table 7 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |