SGLS245F May   2004  – April 2025 UCC2813-0-Q1 , UCC2813-1-Q1 , UCC2813-2-Q1 , UCC2813-3-Q1 , UCC2813-4-Q1 , UCC2813-5-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Detailed Pin Descriptions
        1. 7.3.1.1 COMP
        2. 7.3.1.2 CS
        3. 7.3.1.3 FB
        4. 7.3.1.4 GND
        5. 7.3.1.5 OUT
        6. 7.3.1.6 RC
        7. 7.3.1.7 REF
        8. 7.3.1.8 VCC
      2. 7.3.2  Undervoltage Lockout (UVLO)
      3. 7.3.3  Self-Biasing, Active Low Output
      4. 7.3.4  Reference Voltage
      5. 7.3.5  Oscillator
      6. 7.3.6  Synchronization
      7. 7.3.7  PWM Generator
      8. 7.3.8  Minimum Off-Time Adjustment (Dead-Time Control)
      9. 7.3.9  Leading Edge Blanking
      10. 7.3.10 Minimum Pulse Width
      11. 7.3.11 Current Limiting
      12. 7.3.12 Overcurrent Protection and Full-Cycle Restart
      13. 7.3.13 Soft Start
      14. 7.3.14 Slope Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 UVLO Mode
      3. 7.4.3 Soft-Start Mode
      4. 7.4.4 Fault Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Bulk Capacitor Calculation
        2. 8.2.2.2  Transformer Design
        3. 8.2.2.3  MOSFET and Output Diode Selection
        4. 8.2.2.4  Output Capacitor Calculation
        5. 8.2.2.5  Current Sensing Network
        6. 8.2.2.6  Gate Drive Resistor
        7. 8.2.2.7  REF Bypass Capacitor
        8. 8.2.2.8  RT and CT
        9. 8.2.2.9  Start-Up Circuit
        10. 8.2.2.10 Voltage Feedback Compensation Procedure
          1. 8.2.2.10.1 Power Stage Gain, Zeroes, and Poles
          2. 8.2.2.10.2 Compensating the Loop
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Related Links
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.11 Current Limiting

A 1-V (typical) cycle-by-cycle current limit threshold is incorporated into the UCC2813-x-Q1 family. The 100-ns leading-edge-blanking interval is applied to this current-limiting circuitry. The blanking overrides the current-limit comparator output to prevent the leading-edge switch noise from triggering a current-limit function. Propagation delay from the current-limit comparator to the output is typically 70 ns. This high-speed path minimizes power semiconductor dissipation during an overload by abbreviating the ON time.

For increased efficiency in the current-sense circuitry, the circuit shown in Figure 7-16 can be used. Resistors RA and RB bias the actual current-sense resistor voltage up, allowing a smaller current sense amplitude to be used. This circuitry provides current-limiting protection with lower power-loss current sensing.

UCC2813-0-Q1 UCC2813-1-Q1 UCC2813-2-Q1 UCC2813-3-Q1 UCC2813-4-Q1 UCC2813-5-Q1 Biasing CS For Lower Current-Sense VoltageFigure 7-16 Biasing CS For Lower Current-Sense Voltage
UCC2813-0-Q1 UCC2813-1-Q1 UCC2813-2-Q1 UCC2813-3-Q1 UCC2813-4-Q1 UCC2813-5-Q1 CS Pin Voltage with BiasingFigure 7-17 CS Pin Voltage with Biasing

The example shown uses a 200-mV full-scale signal at the current sense resistor. Resistor RB biases this up by approximately 700 mV to match the 0.9-V minimum specification of the current-limit comparator of the IC. The value of resistor RA changes with the specific device used, due to the different reference voltages. The resistor values should be selected for minimal power loss. For example, a 50-µA bias current sets RB = 13 kΩ, and RA = 75 kΩ for UCC2813-[0,1,2,4]-Q1 or RA = 56 kΩ for UCC2813-[3,5]-Q1 devices.