SGLS245F May   2004  – April 2025 UCC2813-0-Q1 , UCC2813-1-Q1 , UCC2813-2-Q1 , UCC2813-3-Q1 , UCC2813-4-Q1 , UCC2813-5-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Detailed Pin Descriptions
        1. 7.3.1.1 COMP
        2. 7.3.1.2 CS
        3. 7.3.1.3 FB
        4. 7.3.1.4 GND
        5. 7.3.1.5 OUT
        6. 7.3.1.6 RC
        7. 7.3.1.7 REF
        8. 7.3.1.8 VCC
      2. 7.3.2  Undervoltage Lockout (UVLO)
      3. 7.3.3  Self-Biasing, Active Low Output
      4. 7.3.4  Reference Voltage
      5. 7.3.5  Oscillator
      6. 7.3.6  Synchronization
      7. 7.3.7  PWM Generator
      8. 7.3.8  Minimum Off-Time Adjustment (Dead-Time Control)
      9. 7.3.9  Leading Edge Blanking
      10. 7.3.10 Minimum Pulse Width
      11. 7.3.11 Current Limiting
      12. 7.3.12 Overcurrent Protection and Full-Cycle Restart
      13. 7.3.13 Soft Start
      14. 7.3.14 Slope Compensation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 UVLO Mode
      3. 7.4.3 Soft-Start Mode
      4. 7.4.4 Fault Mode
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Bulk Capacitor Calculation
        2. 8.2.2.2  Transformer Design
        3. 8.2.2.3  MOSFET and Output Diode Selection
        4. 8.2.2.4  Output Capacitor Calculation
        5. 8.2.2.5  Current Sensing Network
        6. 8.2.2.6  Gate Drive Resistor
        7. 8.2.2.7  REF Bypass Capacitor
        8. 8.2.2.8  RT and CT
        9. 8.2.2.9  Start-Up Circuit
        10. 8.2.2.10 Voltage Feedback Compensation Procedure
          1. 8.2.2.10.1 Power Stage Gain, Zeroes, and Poles
          2. 8.2.2.10.2 Compensating the Loop
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Related Links
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

Unless otherwise stated, these specifications apply for –40°C ≤ TA ≤ 125°C , TJ = TA; VVCC = 10 V(1); RT = 100 kΩ from REF to RC; CT = 330 pF from RC to GND; 0.1-µF capacitor from VCC to GND; 0.1-µF capacitor from VREF to GND.
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
REFERENCE
Output voltageTJ = 25°C, I = 0.2 mA, UCC2813-[0,1,2,4]-Q14.92555.075V
TJ = 25°C, I = 0.2 mA, UCC2813-[3,5]-Q13.9444.06
Load regulation0.2 mA < I < 5 mA1030mV
Total variationUCC2813-[0,1,2,4]-Q1(5)4.8455.1V
UCC2813-[3,5]-Q1(5)3.8444.08
Output noise voltage10 Hz ≤ f ≤ 10 kHz, TJ = 25°C(7)70µV
Long term stabilityTA = 125°C, 1000 hours(7)5mV
Output short circuit current–5–35mA
OSCILLATOR
Oscillator frequencyUCC2813-[0,1,2,4]-Q1(2)404652kHz
UCC2813-[3,5]-Q1(2)263136
Temperature stabilitySee note (7)2.5%
Amplitude peak-to-peak2.252.42.55V
Oscillator peak voltage2.45V
ERROR AMPLIFIER
Input voltageVCOMP = 2.5 V; UCC2813-[0,1,2,4]-Q12.422.52.56V
VCOMP = 2 V; UCC2813-[3,5]-Q11.9222.05
Input bias current–22µA
Open loop voltage gain6080dB
COMP sink currentVFB = 2.7 V, VCOMP = 1.1 V0.33.5mA
COMP source currentVFB = 1.8 V, VCOMP = VREF – 1.2 V–0.2–0.5–0.8mA
Gain-bandwidth productSee note (7)2MHz
PWM
Maximum duty cycleUCC2813-[0,2,3]-Q19799100%
UCC2813-[1,4,5]-Q1484950
Minimum duty cycleVCOMP = 0 V0%
CURRENT SENSE
GainSee note (3)1.11.651.8V/V
Maximum input signalVCOMP = 5 V(4)0.911.1V
Input bias current–200200nA
CS blank time50100150ns
Over-current threshold1.321.551.7V
COMP to CS offsetVCS = 0 V0.450.91.35V
OUTPUT
OUT low levelI = 20 mA, all parts0.10.4V
I = 200 mA, all parts0.350.9
I = 50 mA, VVCC = 5 V, UCC2813-[3,5]-Q10.150.4
I = 20 mA, VCC = 0 V, all parts0.71.2
VVCC – OUTOUT high VsatI = –20 mA, all parts0.150.4V
I = –200 mA, all parts11.9
I = –50 mA, VVCC = 5 V, UCC2813-[3,5]-Q10.40.9
Rise timeCL = 1 nF4170ns
Fall timeCL = 1 nF4475ns
UNDERVOLTAGE LOCKOUT
Start threshold (6)UCC2813-0-Q16.67.27.8V
UCC2813-1-Q18.69.410.2
UCC2813-[2,4]-Q111.512.513.5
UCC2813-[3,5]-Q13.74.14.5
Stop threshold (6)UCC2813-0-Q16.36.97.5V
UCC2813-1-Q16.87.48
UCC2813-[2,4]-Q17.68.39
UCC2813-[3,5]-Q13.23.64
Start to stop hysteresisUCC2813-0-Q10.120.30.48V
UCC2813-1-Q11.622.4
UCC2813-[2,4]-Q13.54.25.1
UCC2813-[3,5]-Q10.20.50.8
SOFT START
COMP rise timeVFB = 1.8 V, Rise from 0.5 V to REF – 1 V410ms
OVERALL
Start-up currentVVCC < start threshold0.10.23mA
Operating supply currentVFB = 0 V, VCS = 0 V, VRC = 0 V0.51.2mA
VCC internal Zener voltage(6)IVCC = 10 mA(8)1213.515V
VCC internal Zener voltage minus start-threshold voltage (6)UCC2813-[2,4]-Q1(8)0.51V
(1) Adjust VCC above the start threshold before setting at 10 V.
(2) Output frequency for the UCC2813-[0,2,3]-Q1 device is the oscillator frequency. Output frequency for the UCC2813-[1,4,5]-Q1 device is one-half the oscillator frequency.
(3) Gain is defined by: UCC2813-0-Q1 UCC2813-1-Q1 UCC2813-2-Q1 UCC2813-3-Q1 UCC2813-4-Q1 UCC2813-5-Q1 .
(4) Parameter measured at trip point of latch with FB at 0 V.
(5) Total variation includes temperature stability and load regulation.
(6) Start threshold, stop threshold, and Zener-shunt thresholds track one another.
(7) Ensured by design. Not 100% tested in production.
(8) The device is fully operating in clamp mode as the forcing current is higher than the normal operating supply current.