JAJSEG5A January 2018 – October 2018 ADS112U04
There are two methods for ensuring data integrity for data output on the ADS112U04. Output data can be register contents or conversion results. The optional data counter word that precedes conversion data is covered by both data integrity options. The data integrity modes are configured using the CRC[1:0] bits in the configuration register. When CRC[1:0] = 01, a bitwise-inverted version of the data is output immediately following the most significant byte (MSB) of the data.
When CRC[1:0] = 10, a 16-bit CRC word is output immediately following the MSB of the data. In CRC mode, the checksum bytes are the 16-bit remainder of the bitwise exclusive-OR (XOR) of the data bytes with a CRC polynomial. The CRC is based on the CRC-16-CCITT polynomial: x16 + x12 + x5 + 1 with an initial value of FFFFh.
The 17 binary coefficients of the polynomial are: 1 0001 0000 0010 0001. To calculate the CRC, divide (XOR operation) the data bytes (excluding the CRC) with the polynomial and compare the calculated CRC values to the ADC CRC value. If the values do not match, a data transmission error has occurred. In the event of a data transmission error, read the data again.
The following list shows a general procedure to compute the CRC value: