JAJSEG5A January 2018 – October 2018 ADS112U04
The ADS112U04 offers three dedicated general-purpose input/output (GPIO) pins. Use the GPIOnDIR (where n = 0, 1, 2) bits in the configuration register to configure the pin as either an input or an output. The GPIOnDAT bits in the configuration register contain the input or output GPIO data. If a GPIO pin is configured as an input, the respective GPIOnDAT bit reads the status of the pin; if the GPIO pin is configured as an output, write the output status to the respective GPIOnDAT bit.
GPIO2 shares a pin with the DRDY signal. When the pin is configured as an output by the GPIO2DIR bit, the GPIO2SEL bit in the configuration register selects the function of the GPIO2/DRDY pin. If the GPIO2SEL bit is cleared, GPIO2 is routed to the pin. If the bit is set, the pin is driven with the DRDY signal.
See the Register Descriptions section for more information regarding the configuration of the GPIO pins.