JAJSPP1A April   2020  – September 2020 CC2640R2L

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Functional Block Diagram
  5. 5 Revision History
  6. 6 Device Comparison
    1. 6.1 Related Products
  7. 7 Terminal Configuration and Functions
    1. 7.1 Pin Diagram – RGZ Package
    2. 7.2 Signal Descriptions – RGZ Package
    3. 7.3 Pin Diagram – RHB Package
    4. 7.4 Signal Descriptions – RHB Package
  8. 8 Specifications
    1. 8.1  Absolute Maximum Ratings
    2. 8.2  ESD Ratings
    3. 8.3  Recommended Operating Conditions
    4. 8.4  Power Consumption Summary
    5. 8.5  General Characteristics
    6. 8.6  125-kbps Coded (Bluetooth 5) – RX
    7. 8.7  125-kbps Coded (Bluetooth 5) – TX
    8. 8.8  500-kbps Coded (Bluetooth 5) – RX
    9. 8.9  500-kbps Coded (Bluetooth 5) – TX
    10. 8.10 1-Mbps GFSK (Bluetooth low energy) – RX
    11. 8.11 1-Mbps GFSK (Bluetooth low energy) – TX
    12. 8.12 2-Mbps GFSK (Bluetooth 5) – RX
    13. 8.13 2-Mbps GFSK (Bluetooth 5) – TX
    14. 8.14 24-MHz Crystal Oscillator (XOSC_HF)
    15. 8.15 32.768-kHz Crystal Oscillator (XOSC_LF)
    16. 8.16 48-MHz RC Oscillator (RCOSC_HF)
    17. 8.17 32-kHz RC Oscillator (RCOSC_LF)
    18. 8.18 ADC Characteristics
    19. 8.19 Temperature Sensor
    20. 8.20 Battery Monitor
    21. 8.21 Synchronous Serial Interface (SSI)
    22. 8.22 DC Characteristics
    23. 8.23 Thermal Resistance Characteristics
    24. 8.24 Timing Requirements
    25. 8.25 Switching Characteristics
    26. 8.26 Typical Characteristics
  9. 9 Detailed Description
    1. 9.1  Overview
    2. 9.2  Functional Block Diagram
    3. 9.3  Main CPU
    4. 9.4  RF Core
    5. 9.5  Memory
    6. 9.6  Debug
    7. 9.7  Power Management
    8. 9.8  Clock Systems
    9. 9.9  General Peripherals and Modules
    10. 9.10 Voltage Supply Domains
    11. 9.11 System Architecture
  10. 10Application, Implementation, and Layout
    1. 10.1 Application Information
    2. 10.2 5 × 5 External Differential (5XD) Application Circuit
      1. 10.2.1 Layout
  11. 11Device and Documentation Support
    1. 11.1  Device Nomenclature
    2. 11.2  Tools and Software
    3. 11.3  Documentation Support
    4. 11.4  サポート・リソース
    5. 11.5  Texas Instruments Low-Power RF Website
    6. 11.6  Low-Power RF eNewsletter
    7. 11.7  Trademarks
    8. 11.8  静電気放電に関する注意事項
    9. 11.9  Export Control Notice
    10. 11.10 用語集
  12. 12Mechanical, Packaging, and Orderable Information

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発注情報

7.4 Signal Descriptions – RHB Package

Table 7-2 Signal Descriptions – RHB Package
NAMENO.TYPEDESCRIPTION
DCDC_SW17PowerOutput from internal DC/DC(1)
DCOUPL12Power1.27-V regulated digital-supply decoupling(2)
DIO_06Digital I/OGPIO
DIO_17Digital I/OGPIO
DIO_28Digital I/OGPIO, high-drive capability
DIO_39Digital I/OGPIO, high-drive capability
DIO_410Digital I/OGPIO, high-drive capability
DIO_515Digital I/OGPIO, High drive capability, JTAG_TDO
DIO_616Digital I/OGPIO, High drive capability, JTAG_TDI
DIO_720Digital/Analog I/OGPIO, Analog
DIO_821Digital/Analog I/OGPIO, Analog
DIO_922Digital/Analog I/OGPIO, Analog
DIO_1023Digital/Analog I/OGPIO, Analog
DIO_1124Digital/Analog I/OGPIO, Analog
DIO_1225Digital/Analog I/OGPIO, Analog
DIO_1326Digital/Analog I/OGPIO, Analog
DIO_1427Digital/Analog I/OGPIO, Analog
JTAG_TMSC13Digital I/OJTAG TMSC, high-drive capability
JTAG_TCKC14Digital I/OJTAG TCKC(3)
RESET_N19Digital inputReset, active-low. No internal pullup.
RF_N2RF I/ONegative RF input signal to LNA during RX,
Negative RF output signal to PA during TX
RF_P1RF I/OPositive RF input signal to LNA during RX,
Positive RF output signal to PA during TX
RX_TX3RF I/OOptional bias pin for the RF LNA
VDDR29Power1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(4)(2)
VDDR_RF32Power1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2)(5)
VDDS28Power1.8-V to 3.8-V main chip supply(1)
VDDS211Power1.8-V to 3.8-V GPIO supply(1)
VDDS_DCDC18Power1.8-V to 3.8-V DC/DC supply
X32K_Q14Analog I/O32-kHz crystal oscillator pin 1
X32K_Q25Analog I/O32-kHz crystal oscillator pin 2
X24M_N30Analog I/O24-MHz crystal oscillator pin 1
X24M_P31Analog I/O24-MHz crystal oscillator pin 2
EGPPowerGround – exposed ground pad
(1) See technical reference manual (listed in Section 11.3) for more details.
(2) Do not supply external circuitry from this pin.
(3) For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU Technical Reference Manual
(4) If internal DC/DC is not used, this pin is supplied internally from the main LDO.
(5) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.