JAJSHI5G august   2012  – april 2023 DLP7000

PRODUCTION DATA  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. 概要 (続き)
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  Storage Conditions
    3. 7.3  ESD Ratings
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Thermal Information
    6. 7.6  Electrical Characteristics
    7. 7.7  LVDS Timing Requirements
    8. 7.8  LVDS Waveform Requirements
    9. 7.9  Serial Control Bus Timing Requirements
    10. 7.10 Systems Mounting Interface Loads
    11. 7.11 Micromirror Array Physical Characteristics
    12. 7.12 Micromirror Array Optical Characteristics
    13. 7.13 Window Characteristics
    14. 7.14 Chipset Component Usage Specification
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 DLPC410 Chipset DMD Features
        1. 8.3.1.1 DLPC410 - Digital Controller for DLP Discovery 4100 Chipset
        2. 8.3.1.2 DLPA200 - DMD Micromirror Driver
        3. 8.3.1.3 DLPR410 - PROM for DLP Discovery 4100 Chipset
        4. 8.3.1.4 DLP7000 - DLP 0.7 XGA 2xLVDS Type-A DMD
          1. 8.3.1.4.1 DLP7000 XGA Chip Set Interfaces
            1. 8.3.1.4.1.1 DLPC410 Interface Description
              1. 8.3.1.4.1.1.1 DLPC410 IO
              2. 8.3.1.4.1.1.2 Initialization
              3. 8.3.1.4.1.1.3 DMD Device Detection
              4. 8.3.1.4.1.1.4 Power Down
          2. 8.3.1.4.2 DLPC410 to DMD Interface
            1. 8.3.1.4.2.1 DLPC410 to DMD IO Description
            2. 8.3.1.4.2.2 Data Flow
          3. 8.3.1.4.3 DLPC410 to DLPA200 Interface
            1. 8.3.1.4.3.1 DLPA200 Operation
            2. 8.3.1.4.3.2 DLPC410 to DLPA200 IO Description
          4. 8.3.1.4.4 DLPA200 to DLP7000 Interface
            1. 8.3.1.4.4.1 DLPA200 to DLP7000 Interface Overview
        5. 8.3.1.5 Measurement Conditions
    4. 8.4 Device Functional Modes
      1. 8.4.1 DMD Operation
        1. 8.4.1.1 Single Block Mode
        2. 8.4.1.2 Dual Block Mode
        3. 8.4.1.3 Quad Block Mode
        4. 8.4.1.4 Global Mode
    5. 8.5 Optical Interface and System Image Quality Considerations
      1. 8.5.1 Optical Interface and System Image Quality
      2. 8.5.2 Numerical Aperture and Stray Light Control
      3. 8.5.3 Pupil Match
      4. 8.5.4 Illumination Overfill
    6. 8.6 Micromirror Array Temperature Calculation
      1. 8.6.1 Package Thermal Resistance
      2. 8.6.2 Case Temperature
      3. 8.6.3 Micromirror Array Temperature Calculation - Lumens Based (typically used for display applications)
      4. 8.6.4 Micromirror Array Temperature Calculation - Power Density Based
      5. 8.6.5 62
    7. 8.7 Micromirror Landed-On/Landed-Off Duty Cycle
      1. 8.7.1 Definition of Micromirror Landed-On/Landed-Off Duty Cycle
      2. 8.7.2 Landed Duty Cycle and Useful Life of the DMD
      3. 8.7.3 Landed Duty Cycle and Operational DMD Temperature
      4. 8.7.4 Estimating the Long-Term Average Landed Duty Cycle of a Product or Application
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Device Description
      3. 9.2.3 Detailed Design Procedure
  10. 10Power Supply Recommendations
    1. 10.1 DMD Power-Up and Power-Down Procedures
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Impedance Requirements
      2. 11.1.2 PCB Signal Routing
      3. 11.1.3 DMD Interface
        1. 11.1.3.1 Trace Length Matching
      4. 11.1.4 DLP7000 Decoupling
        1. 11.1.4.1 Decoupling Capacitors
      5. 11.1.5 VCC and VCC2
      6. 11.1.6 DMD Layout
      7. 11.1.7 DLPA200
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1  Device Support
      1. 12.1.1 Device Marking
    2. 12.2  サード・パーティ製品に関する免責事項
    3. 12.3  Documentation Support
      1. 12.3.1 Related Documents
    4. 12.4  ドキュメントの更新通知を受け取る方法
    5. 12.5  サポート・リソース
    6. 12.6  静電気放電に関する注意事項
    7. 12.7  Export Control Notice
    8. 12.8  用語集
    9. 12.9  Related Links
    10. 12.10 Trademarks
  13. 13Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)(1)
MIN NOM MAX UNIT
ELECTRICAL (2) (3)
VCC Supply voltage for LVCMOS core logic 3.0 3.3 3.6 V
VCC1 Supply voltage for LVDS receivers 3.0 3.3 3.6 V
VCC2 Mirror electrode and HVCMOS supply voltage 7.25 7.5 7.75 V
VMBRST Clocking Pulse Waveform Voltage applied to MBRST[29:0] Input Pins (supplied by DLPA200s) -27 26.5 V
|VCCI–VCC| Supply voltage delta (absolute value) (4) 0.3 V
ENVIRONMENTAL
RH Operating relative humidity (non-condensing) 95 %
ENVIRONMENTAL (5) For Illumination Source Between 420 nm and 700 nm
TARRAY Array temperature, Short–term operational (12)(7)(9) 0 10 °C
TWINDOW Window Temperature test points TP2 and TP3, Long-term operational(8) 10 65 °C
|TDELTA| Absolute Temperature delta between the window test points (TP2, TP3) and the ceramic test point TP1.(11) 10 °C
ILLVIS Illumination(10) Thermally limited W/cm2
ENVIRONMENTAL (5) For Illumination Source Between 400 nm and 420 nm
TARRAY Array temperature, Long–term operational (12)(7)(6)(8) 20 30 °C
TWINDOW Window Temperature test points TP2 and TP3, Long-term operational(8) 30 °C
|TDELTA| Absolute Temperature delta between the window test points (TP2, TP3) and the ceramic test point TP1.(11) 10 °C
ILL Illumination(10) 11 W/cm2
16.2 W
ENVIRONMENTAL (5) For Illumination Source <400 nm and >700 nm
TARRAY Array temperature, Long–term operational (12)(7) (6)(8) 20 40 (13) °C
Array temperature, Short–term operational Micromirror Array Temperature Calculation(7) (9) 0 20
TWINDOW Window Temperature test points TP2 and TP3, Long-term operational(8) 10 65 °C
ILL Illumination(10) 10 mW/cm2
The functional performance of the device specified in this data sheet is achieved when operating the device within the limits defined by the Recommended Operating Conditions. No level of performance is implied when operating the device above or below the Recommended Operating Conditions limits.
Voltages VCC, VCC1, and VCC2 are required for proper DMD operation. VSS must also be connected.
All voltages are referenced to common ground VSS.
Exceeding the recommended allowable absolute voltage difference between VCC and VCC1 may result in excess current draw. The difference between VCC and VCC1, |VCC – VCC1|, should be less than the specified limit.
Optimal, long-term performance and optical efficiency of the Digital Micromirror Device (DMD) can be affected by various application parameters, including illumination spectrum, illumination power density, micromirror landed duty-cycle, ambient temperature (storage and operating), DMD temperature, ambient humidity (storage and operating), and power on or off duty cycle. TI recommends that application-specific effects be considered as early as possible in the design cycle.
Simultaneous exposure of the DMD to the maximum Recommended Operating Conditions. for temperature and UV illumination will reduce device lifetime.
The array temperature cannot be measured directly and must be computed analytically from the temperature measured at test point 1 (TP1) shown in Figure 8-10 and the package thermal resistance in Thermal Information using Micromirror Array Temperature Calculation.
Long-term is defined as the usable life of the device.
Array temperatures beyond those specified as long-term are recommended for short-term conditions only (power-up). Short-term is defined as cumulative time over the usable life of the device and is less than 500 hours.
Total integrated illumination power density, above or below the indicated wavelength threshold or in the indicated wavelength range.
The temperature delta is the highest difference between the ceramic test point (TP1) and window test points (TP2) and (TP3) in Thermal Test Point Location.
In some applications, the total DMD heat load can be dominated by the amount of incident light energy absorbed. See Micromirror Array Temperature Calculation for further details.
Per Figure 7-1, the maximum operational case temperature should be derated based on the micromirror landed duty cycle that the DMD experiences in the end application. Refer to Micromirror Landed-On/Landed-Off Duty Cycle for a definition of micromirror landed duty cycle.
GUID-32C0305A-FD5E-48FB-B3AF-FC386785FC9D-low.gifFigure 7-1 Max Recommended DMD Temperature – Derating Curve