The total load current of the bias supply is mainly determined by the total MOSFET gate charge Qg. Assume the system employs multiple LM5171-Q1s to implement M number of phases, and each phase uses N number of MOSFETs in parallel as one switch. There are 2× N MOSFETs per phase to drive. Then the total current to drive these MOSFETs through VCC bias supply is determined by Equation 89.

Equation 89.

where

• 5 mA is the worst case maximum current used by the control logic circuit of each phase.

In an example of a four-phase system employing two parallel MOSFETs for one switch, where M = 4, N = 2, Q_g = 100 nC, and F_sw = 100 KHz, the bias supply must be able to support at least the following total load current:

Equation 90.

In an example of an eight-phase system employing the same parallel MOSFETs for one switch, the bias supply must be able to support the following total load current:

Equation 91.

As described in Bias Supplies and Voltage Reference (VCC, VDD, and VREF)The LM5171-Q1 integrates a LDO driver to drive an external N-channel enhancement MOSFET to generate 9V bias supply at the VCC pin. PMT560ENEAX is selected in this application.

However, the loss of the external MOSFET may be quite high especially in high load current and high input voltage conditions. External 10- to 12-V VCC bias supply may be preferred. If not available in the system, the user can generate it from the LV-port using a buck-boost or SEPIC converter, or from the HV-port using a buck converter. Refer to the Texas Instruments LM25118-Q1 and LM5118-Q1 to implement a buck-boost converter, or LM5001-Q1 to implement a SEPIC converter, or the LM5160-Q1 and LM5161-Q1 to implement a buck converter.

A bypass capacitor must be placed close to the VCC and PGND pins. In this application, 2.2 µF, 16 V ceramic capacitor is selected.