JAJSMI7A
July 2022 – December 2022
OPA817
PRODUCTION DATA
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics: VS = ±5 V
7.6
Typical Characteristics: VS = ±5 V
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Input and ESD Protection
8.3.2
Feedback Pin
8.3.3
FET-Input Architecture with Wide Gain-Bandwidth Product
8.3.4
Device Functional Modes
8.3.4.1
Power-Down (PD) Pin
9
Application and Implementation
9.1
Application Information
9.1.1
Wideband, High-Input Impedance DAQ Front-End
9.2
Typical Applications
9.2.1
High Input Impedance, 200 MHz, Digitizer Front-End Amplifier Design
9.2.2
Design Requirements
9.2.3
Detailed Design Procedure
9.2.4
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Thermal Considerations
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Development Support
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
サポート・リソース
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DTK|8
MPQF524
サーマルパッド・メカニカル・データ
発注情報
jajsmi7a_oa
jajsmi7a_pm
12.2
Documentation Support