SBOA508 January   2022 INA818 , INA819 , INA823 , INA849 , OPA2392 , OPA391 , OPA392 , OPA396 , OPA397 , OPA3S328

 

  1.   Trademarks
  2. 1Single N-FET or P-FET vs Complimentary N-P-FET Input Stage Limitations
  3. 2Example 1: Output Swing Limitation from VCM in an Op-Amp for Low Side Current Sense
  4. 3Bipolar and CMOS Output Stage Topologies and Output Swing Limitations
  5. 4Example 2: Output Swing Limitations With Instrumentation Amplifiers
  6. 5Summary
  7. 6References

Single N-FET or P-FET vs Complimentary N-P-FET Input Stage Limitations

The common-mode voltage range of an amplifier is the range of usable input voltages allowing for linear operation. Depending on the input stage topology, amplifiers may have common mode input range (VCM) which may be limited relative to one or both supply rails; best case scenario is achieved when input voltage range extends slightly beyond both supply rails (rail-to-rail operation). Limitations in the VCM range come from operating voltages needed to bias the transistors in the input stage, and to ensure operation within a linear range (saturation range for MOSFET or active range for bipolar transistors). We’ll illustrate these limitations for MOSFET amplifier input stages. Figure 1-1 shows a simplified representation of an N-channel MOSFET input stage. The stage consists of a current source (single NMOS, Q3, shown for simplicity), a differential pair with input voltage applied to the gate of each transistor, and an active load PMOS current mirror, Q4 and Q5. The NMOS differential pair has an input common mode voltage limitation with respect to the negative rail, –Vs. Performing Kirchhoff’s voltage walk from –Vs to Vin+, we have:

Equation 1. Vin± (min) = –Vs + Vsat(Q3) + Vgs(Q1,Q2)
Vin± (min) = –Vs + 0.1 V + 0.9 V
Vin± (min) = –Vs + 1 V

Therefore, the N-channel MOSFET VCM range is limited to -Vs by a certain voltage as detailed in Equation 1. Note that we make some important assumptions, namely that Vsat of both NMOS and PMOS transistors are perfectly matched and equal to 0.1V (a typical value). Similarly, we assume that Vgs for both NMOS and PMOS transistors are equal and have a value of 0.9V, a typical value to turn on the transistors. With these assumptions in mind, we can say that this simplified NMOS input stage allows input common mode voltage range operation about 1 V from Vs. Performing Kirchhoff’s walk from the opposite end, +Vs to Vin±, we get:

Equation 2. Vin± (max) = +Vs – Vds(Q5,Q4) – Vds(Q1,Q2) + Vgs(Q1,Q2)
Vin± (max) = +Vs - Vgs(Q4,Q5) – Vsat(Q1,Q2) + Vgs(Q1,Q2)
Vin± (max) = +Vs – 0.9 V - 0.1 V+ 0.9 V
Vin± (max) = +Vs – 0.1 V
Figure 1-1 Simplified Representation of an N-Channel MOSFET Input Stage

Given that Vgs typically exceeds Vds for a MOSFET at the edge saturation (Vsat at a minimum, Vgs at a maximum), the maximum VCM comes within Vsat, or 100 mV, of the positive rail, +Vs.

Conversely, the P-channel MOSFET input stage is limited on the positive side, usually on the order of 1 V from positive rail, +Vs. On the negative side, the common mode voltage range of a P-MOSFET can come within Vsata, or 100 mV from the negative rail,-Vs.

To avoid the limitations of the single differential pair input stage, a complimentary N-channel and P-channel MOSFET (CMOS) input stage design can be used. This design uses two input differential pairs (an N-channel MOSFET pair and a P-channel MOSFET pair), a current steering scheme, and a double-folded cacose summing the two input signals (Figure 1-2). Vset is a voltage source used to control the functionality of the diverting transistor Q8. For common mode voltage below +Vs – Vset, Q8 is off, and the drain current (Id) from Q5 (current source) flows straight through the P-channel differential pair (Q1 and Q2). The double-folded cascode allows the drains of Q1 and Q2 to be biased down to Vsat above – Vs, resulting in VCM swing below the negative rail. This allows the VCM to extend a certain voltage, ΔVP, below the negative rail. Similarly, for common mode voltage above +Vs – Vset Q8 is on, and Id is steered from the P-channel pair to the N-channel pair via the current mirror (Q6 and Q7). The VCM range can therefore exceed the positive rail, +Vs, by a certain voltage, ΔVN. To sum it up, this gives an op-amp with this input stage topology a rail-to-rail VCM range as detailed in Equation 3.

Equation 3. + Vs + ΔVN > VCM > – Vs – ΔVP
Figure 1-2 Simplified Representation of a Complementary N-P-FET Input Stage

Now that we understand the rail-to-rail operation of a complementary input stage, we more elaborately address ΔVN and ΔVP. Looking deeper into the complementary input stage amplifier in Figure 1-2, we can see that the rail-to-rail input performance is dependent on the second stage. Using Kirchhoff’s voltage law from the positive rail down to the input, similar to the one performed previously on Figure 1-1.

Equation 4. Vin± (max) = +Vs – Vsat(Q9,Q10) – Vds(Q3,Q4) + Vgs(Q3,Q4)
Vin± (max) = +Vs – 0.1 V – 0.1 V + 0.9 V
Vin± (max) = +Vs + 0.7 V

We can see from Equation 4 above that the complimentary input stage amplifier has input common mode range 0.7 V above the positive rail. We can find the common mode input voltage range to the negative rail by performing the same procedure.

Equation 5. Vin± (min) = – Vs + Vsat(Q11,Q12) + Vsat(Q1,Q2) – Vgs(Q1,Q2)
Vin± (min) = – Vs + 0.1 V + 0.1 V – 0.9 V
Vin± (min) = – Vs – 0.7 V

From Equation 4 and Equation 5 we find that the common mode input voltage range extends beyond the positive and negative rail typically by about 0.7 V, which is represented by the aforementioned terms ΔVN and ΔVP. In data sheets, you will notice that most rail-to-rail amplifiers are specified up to 0.1 V (not 0.7 V) beyond the supplies. This is due to the protection diodes between the input and each rail.