SBOA602 November 2024 OPA593
In this design, the current booster is configured as a complementary push-pull Darlington topology with unity gain buffering. Figure 2-1 and Figure 2-2 demonstrate that the open-loop output impedance is regulated by a small bias voltage applied to the bases of the transistors. Forward biasing the base-emitter junction of the NPN transistor (T1) allows the booster to source positive voltage and current, while forward biasing the PNP transistor (T2) enables it to sink negative voltage and current. The bias voltage directly affects the open-loop output impedance; higher bias levels result in lower output impedance, as shown in Equation 1.
Where,
When the NPN transistor (T1) base-emitter junction is forward-biased, the current booster sources positive voltage and current at the output. Figure 2-1 illustrates the open-loop output impedance where the effects of ZCE ∥RL are shown to be less than 1Ω.
Conversely, when the emitter-base junction of the PNP transistor (T2) is forward-biased, the current booster sinks negative voltage and current at the output. Figure 2-2 demonstrates the open-loop output impedance, with the ZCE ∥RL effects yielding similar results. The combined open-loop output impedance remains consistent across the frequency range up to 1MHz.
The BJT transistor's forward biased voltage directly affects the open-loop output impedance; higher bias voltages lead to lower output impedance. The open-loop output impedance of the push-pull complementary BJT driver is primarily influenced by the output resistances (ro) of the NPN (rop) and PNP (ron) transistors, as well as the load resistance (RL). The open-loop output impedance of the Darlington current booster operates in parallel with RL, as illustrated in Equation 1.