SLAAEN0 September   2024 MSPM0L1227 , MSPM0L1227-Q1 , MSPM0L1228 , MSPM0L1228-Q1 , MSPM0L2227 , MSPM0L2227-Q1 , MSPM0L2228 , MSPM0L2228-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Low-Frequency Subsystem Introduction
    1. 2.1 Resetting LFSS IP Using VBAT
    2. 2.2 Power Domain Supply Detection
      1. 2.2.1 Start-Up Sequences
      2. 2.2.2 LFSS IP Behavior
    3. 2.3 LFXT, LFOSC
    4. 2.4 Independent Watchdog Timer (IWDT)
    5. 2.5 Tamper I/O
      1. 2.5.1 IOMUX Mode
      2. 2.5.2 Tamper Mode
        1. 2.5.2.1 Tamper Event Detection
        2. 2.5.2.2 Timestamp Event Output
        3. 2.5.2.3 Heatbeat Generator
    6. 2.6 Scatchpad Memory (SPM)
    7. 2.7 Real-Time Clock (RTC)
    8. 2.8 VBAT Charging Mode
  6. 3Application Examples
    1. 3.1 Tamper I/O Heartbeat Example
    2. 3.2 RTC Tamper I/O Timestamp Event Example
    3. 3.3 Supercapacitor Charging Example
    4. 3.4 LFOSC Transition Back to LFXT Example
    5. 3.5 RTC_A Calibration
      1. 3.5.1 Peripheral ADC 12
      2. 3.5.2 RTC_A

2.5.2.3 Heatbeat Generator

The heartbeat generator allows the signaling of certain LFSS operating states to be visible for the users. The generator can be used as a trigger for an external watchdog to indicate whether RTC or another application is still functioning by flashing the LED. E-metering is an example of utilizing Tamper I/O to trigger an event which is captured by the Timestamp. The event that is captured by Timestamp is signaling through the heartbeat generator to notify the user because an event was detected. In the diagram, RT2PS, RT1PS, and RT0PS are the counters that propagate through to divide down and set the heartbeat speed for the Heartbeat Generator. The users are able to set the HBINTERVAL in between 125ms, 250ms, 500ms, 1s, 2s, 4s, 8s, and 16s. The user is also able to set the HBWIDTH in between 1ms to 128ms, in binary steps. Figure 2-7 shows the full diagram flow.

MSPM0L2228 Heartbeat Generator DiagramFigure 2-7 Heartbeat Generator Diagram