SLAU958A January   2025  – March 2025 MSPM0G3507

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Setup
    1. 2.1  EVM Hardware Setup
      1. 2.1.1 EVM Hardware Support
    2. 2.2  Peripheral Configurations for IPD Usage
    3. 2.3  Pin Configurations for PWM Outputs
    4. 2.4  Pin Configurations for ADC Currents
    5. 2.5  Pin Configurations for ADC Voltages
    6. 2.6  Pin Configurations for Faults
    7. 2.7  Pin Configurations for GPIO Output Functions
    8. 2.8  Pin Configurations for SPI Communication
    9. 2.9  Pin Configurations for UART Communication
    10. 2.10 External Connections for Evaluation Boards
  6. 3Software Setup
  7. 4GUI Setup
    1. 4.1 Serial Port Configuration
    2. 4.2 GUI Home Page
    3. 4.3 System Configurations
    4. 4.4 Register Map
    5. 4.5 Motor Tuning Page
    6. 4.6 Collateral Page
    7. 4.7 Loading and Saving Register Configurations
  8. 5Register Map
    1. 5.1 Register Map Page in GUI
    2. 5.2 User Control Registers (Base Address = 0x20200400h)
      1. 5.2.1 Speed Control Register (Offset = 0h) [Reset = 00000000h]
      2. 5.2.2 Algo Debug Control 1 Register (Offset = 4h) [Reset = 00000000h]
      3. 5.2.3 Algo Debug Control 2 Register (Offset = 8h) [Reset = 00000000h]
      4. 5.2.4 Algo Debug Control 3 Register (Offset = Ch) [Reset = 00000000h]
      5. 5.2.5 DAC Configuration Register (Offset = 10h) [Reset = 00000000h]
    3. 5.3 User Input Registers (Base Address = 0x20200000h)
      1. 5.3.1  SYSTEM_PARAMETERS (Offset = 0h)
      2. 5.3.2  ISD_CONFIG Register (Offset = 3Ch) [Reset = 00000000h]
      3. 5.3.3  MOTOR_STARTUP1 Register (Offset = 40h) [Reset = 00000000h]
      4. 5.3.4  MOTOR_STARTUP2 Register (Offset = 44h) [Reset = 00000000h]
      5. 5.3.5  CLOSED_LOOP1 Register (Offset = 48h) [Reset = 00000000h]
      6. 5.3.6  CLOSED_LOOP2 Register (Offset = 4Ch) [Reset = 00000000h]
      7. 5.3.7  FIELD_CTRL Register (Offset = 50h) [Reset = 00000000h]
      8. 5.3.8  FAULT_CONFIG1 Register (Offset = 54h) [Reset = 00000000h]
      9. 5.3.9  FAULT_CONFIG2 Register (Offset = 58h) [Reset = 00000000h]
      10. 5.3.10 MISC_ALGO Register (Offset = 5Ch) [Reset = 00000000h]
      11. 5.3.11 PIN_CONFIG Register (Offset = 60h) [Reset = 00000000h]
      12. 5.3.12 PERI_CONFIG Register (Offset = 64h) [Reset = 00000000h]
    4. 5.4 User Status Registers (Base Address = 0x20200430h)
  9. 6Basic Tuning
    1. 6.1 System Configuration Parameters
      1. 6.1.1 Configuring System Parameters From GUI
      2. 6.1.2 Motor Resistance in Milliohms (mΩ)
      3. 6.1.3 Motor Inductance in Microhenries (μH)
      4. 6.1.4 Saliency of IPMSM Motor
      5. 6.1.5 Motor BEMF Constant
      6. 6.1.6 Base Voltage (V)
      7. 6.1.7 Base Current (A)
      8. 6.1.8 Maximum Motor Electrical Speed (Hz)
      9. 6.1.9 Maximum Motor Power(W)
    2. 6.2 Control Configurations for Basic Motor Spinning
      1. 6.2.1 Basic Motor Startup
        1. 6.2.1.1 Disable ISD
        2. 6.2.1.2 Motor Start Option - Align
        3. 6.2.1.3 Motor Open Loop Ramp
        4. 6.2.1.4 Motor Open Loop Debug
      2. 6.2.2 Controller Configuration for Spinning the Motor in Closed Loop
        1. 6.2.2.1 BEMF estimation for Sensorless Rotor Position detection
          1. 6.2.2.1.1 Enhanced Sliding Mode Observer
          2. 6.2.2.1.2 Finite BEMF Estimation Based on Motor model
        2. 6.2.2.2 Rotor Position and Speed Estimation With PLL
        3. 6.2.2.3 PI Controller Tuning for Closed Loop Speed Control
          1. 6.2.2.3.1 Current Loop PI Tuning
          2. 6.2.2.3.2 Speed Controller Tuning
        4. 6.2.2.4 Testing for Successful Startup Into Closed Loop
    3. 6.3 Fault Handling
      1. 6.3.1 Abnormal BEMF Fault [ABN_BEMF]
      2. 6.3.2 Monitoring Power Supply Voltage Fluctuations for Voltage Out of Bound Faults
      3. 6.3.3 No Motor Fault [NO_MTR]
  10. 7Advanced Tuning
    1. 7.1 Control Configurations Tuning
      1. 7.1.1  Control Mode of Operation
        1. 7.1.1.1 Closed Loop Speed Control Mode
        2. 7.1.1.2 Closed Loop Power Control Mode
        3. 7.1.1.3 Closed Loop Torque Control Mode
        4. 7.1.1.4 Voltage Control Mode
      2. 7.1.2  Initial Speed Detection of the Motor for Reliable Motor Resynchronization
      3. 7.1.3  Unidirectional Motor Drive Detecting Backward Spin
      4. 7.1.4  Preventing Back Spin of Rotor During Startup
        1. 7.1.4.1 Option 1: IPD
        2. 7.1.4.2 Option 2: Slow First Cycle
      5. 7.1.5  Gradual and Smooth Start up Motion
      6. 7.1.6  Faster Startup Timing
        1. 7.1.6.1 Option 1: Initial Position Detection (IPD)
        2. 7.1.6.2 Option 2: Slow First Cycle
      7. 7.1.7  Stopping Motor Quickly
      8. 7.1.8  Flux Weakening: Operating Motor at Speeds Higher than Rated Speed
      9. 7.1.9  Maximum Torque Per Ampere : Improve Efficiency of IPMSM Motors
      10. 7.1.10 Preventing Supply Voltage Overshoot During Motor Stop.
      11. 7.1.11 Protecting the Power Supply
      12. 7.1.12 FOC Bandwidth Selection
  11. 8Hardware Configurations
    1. 8.1 Direction Configuration
    2. 8.2 Brake Configuration
    3. 8.3 Main.h Definitions
      1. 8.3.1 Sense Amplifier Configuration
      2. 8.3.2 Driver Propagation Delay
      3. 8.3.3 Driver Min On Time
      4. 8.3.4 Current Shunt Configuration Selection
        1. 8.3.4.1 Three Shunt Configurations
        2. 8.3.4.2 Dual Shunt Configuration
        3. 8.3.4.3 Single Shunt Configuration
      5. 8.3.5 CSA Offset Scaling Factor Selection
    4. 8.4 Real-Time Variable Tracking
  12. 9Revision History

5.2 User Control Registers (Base Address = 0x20200400h)

User Control Registers are set of user configurable parameters to control the Motor in real time.

These set of registers can be modified in the application code using pointer variable pUserCtrlRegs. Figure 5-3 shows the set of user Control registers as imported in CSS expression window.

User Control Registers in CCS Debug Mode Figure 5-3 User Control Registers in CCS Debug Mode
Table 5-1 User Control registers
Offset Acronym Register Name Section
0h SPEED_CTRL Speed Control Register Section 5.2.1
4h ALGO_DEBUG_CTRL1 Algorithm Debug Control 1 register Section 5.2.2
8h ALGO_DEBUG_CTRL2 Algorithm Debug Control 2 register Section 5.2.3
Ch ALGO_DEBUG_CTRL3 Algorithm Debug Control 3 register Section 5.2.4
10h DAC_CTRL DAC Configuration and Control register Section 5.2.5

Complex bit access types are encoded to fit into small table cells as shown in Table 5-2.

Table 5-2 Register Configuration Access Type Codes
Access Type Code Description
Read Type
R R Read
Write Type
W W Write
Reset or Default Value
-n Value after reset or the default value