SLUUD44 June   2025 UCC57142

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Additional Images
    2. 2.2 Power Requirements
    3. 2.3 Setup for Different UCC57142 Variants
    4. 2.4 I/O Description
    5. 2.5 Jumper Information
    6. 2.6 DBV Package Compatibility
      1. 2.6.1 UCC27511 Modification
      2. 2.6.2 UCC27517 and UC27533 Modification
        1. 2.6.2.1 UCC27518, UCC27519, UCC27536, and UCC27537 Modification
      3. 2.6.3 UCC27531 and UCC27532 Modification
      4. 2.6.4 UCC44273 Modification
  7. 3Implementation Results
    1. 3.1 Equipment Setup
      1. 3.1.1 Power Supply
      2. 3.1.2 Function Generator
      3. 3.1.3 Oscilloscope
      4. 3.1.4 Digital Multimeter (DMM)
    2. 3.2 Bench Setup
    3. 3.3 Procedure and Results
    4. 3.4 Typical Performance Waveforms
      1. 3.4.1 Normal Operation
      2. 3.4.2 Overcurrent Protection Feature
  8. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  9. 5Compliance Information
  10. 6Additional Information
    1. 6.1 Trademarks

UCC27511 Modification

The UCC57142EVM out-of-the-box can be made compatible with the UCC27511 through the following modifications:

  1. Remove any jumpers present on the EVM.
  2. Remove R1, R3, R7, and D1.
  3. Short C4, and C5.
  4. Populate R5 with gate resistor.
  5. Replace C7 with a 1μF capacitor (VDD bypass capacitor).

Table 2-5 lists how the I/O headers are used for the UCC27511.

Table 2-5 Header Functionality

EVM Header

Function

OCP / OCP_IN

VDD pin / VCC signal input

GND_IO

OUTH pin

OUT / Gate

OUTL pin / Gate

VDD / VCC

GND pin / unused

EN/FLT / EN/FLT_IN

IN- pin / IN- signal input(1)

IN / IN_IN

IN+ pin / IN+ signal input(1)
The UCC27511 requires the input pins to be biased for proper operation. If using the driver in non-inverting configuration, then bias IN- pin to GND. If using the driver in inverting configuration, then bias IN+ pin to VDD. Bias the pins using the appropiate headers.