SLVAFP8 December   2023 AM625SIP , TPS65219

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. Introduction
  5. TPS65219 Overview
    1. 2.1 TPS65219 Functional Block Diagram
  6. TPS65219 Variants
    1. 3.1 TPS65219 NVMs to Power AM625SIP
  7. TPS6521905 User-Programmable NVM
  8. AM62x Core Voltage Selection
  9. VSYS Voltage Ramp
  10. Power Block Diagrams
    1. 7.1 TPS6521902 Powering AM62x
    2. 7.2 TPS6521908 Powering AM62x
  11. TPS65219 VS Discrete
  12. Summary
  13. 10References

Introduction

The TPS65219 PMIC is a cost and space optimized solution developed to power the AM62x processor and its principal peripherals. This PMIC has flexible mapping and comes in several factory programmed orderable part numbers to support different use cases. The AM625SIP processor requires at minimum power for six main rails. These include the core supply (VDD_CORE), DDR PHY IO supply (VDDS_DDR), 1.8 V VDDA analog supply and the 1.8V/3.3 V IO supplies and analog IO rails (VDDSHV). Powering a processor such as the AM62x family demands requirements such as sufficient current headroom, tight transient requirements, and a number of rails that can be fully controlled for power up and power down sequencing. In the event of any inconsistency between any user's guide, application report, or other referenced material, the data sheet specification is the definitive source.

Note: This application note covers AM625SIP specifically. For AM625, AM625-Q1, AM623 and AM620-Q1, refer to SLVAFD0