SLVAFP8 December   2023 AM625SIP , TPS65219

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 TPS65219 Overview
    1. 2.1 TPS65219 Functional Block Diagram
  6. 3 TPS65219 Variants
    1. 3.1 TPS65219 NVMs to Power AM625SIP
  7. 4 TPS6521905 User-Programmable NVM
  8. 5 AM62x Core Voltage Selection
  9. 6 VSYS Voltage Ramp
  10. 7 Power Block Diagrams
    1. 7.1 TPS6521902 Powering AM62x
    2. 7.2 TPS6521908 Powering AM62x
  11. 8 TPS65219 VS Discrete
  12. 9 Summary
  13. 10References

5 AM62x Core Voltage Selection

VDD_CORE is the Core supply of the AM62x processor. This domain has two operating points. Table 5-1 compares the 0.75V and 0.85V operating points in terms of frequency, power consumption, power mapping and sequencing requirements. Since AM62x does not support dynamic voltage scaling, different TPS65219 orderable part numbers are used to support the 0.75 V or 0.85 V operating points.

Table 5-1 CORE Voltage Selection
VDD_CORE
0.75 V

(Flexible Core)

 0.85 V

(Lowest BOM option)
Maximum operating frequency on A53SS (Cortex-A53x) Up to 1.25 GHz Up to 1.4 GHz
Power Consumption lower power consumption VDD_CORE [1] higher power consumption [1]
PMIC and Processor Power Mapping Requires two PMIC rails; One to supply VDD_CORE at 0.75V and a second PMIC rail to supply VDDR_CORE at 0.85V.

Buck1, when configured to output 0.75V, is used to supply VDD_CORE. LDO2, when configured to output 0.85V, is used to supply VDDR_CORE.

Lowest BOM option.

Allows suppling VDD_CORE (Core supply) and VDDR_CORE (RAM supply) from the same PMIC rail.

Buck1, when configured to output 0.85V, is used to supply both CORE rails.
Sequencing Power-up and power-down sequence requirements.

VDD_CORE needs to ramp up before VDDR_CORE.

VDD_CORE needs to ramp down after VDDR_CORE.

No sequencing requirements for the CORE supplies as they are both supplied by the same PMIC rail.
(1) For information on the processor power consumption, see the AM62x Power Estimation Tool application note.