USB Type-C DRP/DRD: USB 2.0 with USB PD

Applications with increasing complexity require USB PD. As mentioned in the introduction, systems with USB PD can support power levels of up to 20 V and 5 A (100 W). This is possible by first increasing the voltage on VBUS while holding the maximum current at 3 A. After reaching the maximum voltage of 20 V, you can increase the current up to 5 A, as shown in Figure 7.

Figure 7 shows that:

• The discrete voltage levels required are 5 V, 9 V, 15 V and 20 V (modified in USB PD specification v3.0).
• The current can vary continuously, depending on the required power level (up to 3 A).
• At any given power level, a source is required to support all previous voltages and power levels.

For example, a 60-W source must be able to supply 20 V at 3 A, 15 V at 3 A, 9 V at 3 A and 5 V at 3 A. This is an update in version 3.0 of the USB PD specification, in order to ensure that higher power supplies could support lower-powered devices. An example is a charger for both your laptop and phone.

Figure 8 highlights four new blocks that come into play for USBPD applications. The VBUS FET introduced earlier can now handle 5 V to 20 V (at discrete levels, depending on the desired power level), and potentially up to 5 A (again, only when providing 20 V). Figure 8 also shows the addition of a gate-driver block for the higher-power FET. Some devices integrate a high-power FET as well as a gate driver to drive an even higher-power external FET (TI’s USB PD controllers, for example), while other devices integrate just the gate driver, or integrate neither.

Up to this point, we have not discussed electrostatic discharge protection in the block diagrams because it is not any different from non-USB Type-C systems (outside of the higher channel count). The exception is with VBUS-to-short protection. The USB Type-C connector has a higher pin density than legacy USB connectors. As a result, it is easier to accidentally short VBUS to adjacent pins (see the appendix). Since VBUS can be as high as 20 V, it is possible to have a short between the 20 V and a 5-V line (such as sideband use [SBU], CC and so on). To protect against this potentially catastrophic event, TI introduced a family of USB Type-C protection integrated circuits.

Two other new blocks are the USB PD PHY and USB PD manager. Together, these blocks send packets of data across the CC lines, enabling communication between the DFP and UFP. This communication enables the source to advertise what power levels it can support, and the sink can then request a supported power level. Once a power level is set, the voltage and current levels are adjusted.

It is important to distinguish the difference in roles between the USB PD manager and the USB PD PHY; several USB Type-C devices may include one but not the other. For example, a general-purpose microcontroller can act as a USB PD manager, but does not have the USB PD PHY. The USB PD PHY’s responsibility is to drive the CC lines, but it is not intelligent by itself.

The USB PD manager is the brains, containing a complex state machine to support USB PD negotiation and to control the PHY. (The USB PD manager also performs Alternate Mode negotiation.) The USB PD manager does this by telling the PHY which packets to send, such as advertising the power level, requesting the power level and acknowledging the channel power level. For a more detailed explanation, see reference [2].

The main takeaway is that if USB PD is required, you need a USB PD PHY and a USB PD manager. You can implement a USB PD PHY and USB PD manager by using an integrated solution with the USB PD manager and USB PD PHY solution in the same device, or implementing a USB PD manager on a microcontroller and using a separate PHY with a USB Type-C port controller.

For DFP applications implementing USB PD, see the USB Type-C portal onTI.com.