SNLA491 August   2025 DP83826AE , DP83826AI

 

  1.   1
  2.   Trademarks
  3. 1DP83826A Application Overview
  4. 2Troubleshooting the Application
    1. 2.1 Schematic and Layout Checklist
    2. 2.2 Device Health Checks
      1. 2.2.1 Voltage Checks
      2. 2.2.2 Probe the RESET_N Signal
      3. 2.2.3 Probe RBIAS and CEXT
      4. 2.2.4 Probe the XI Clock
      5. 2.2.5 Probe the Strap Pins During Initialization
      6. 2.2.6 Probe the Serial Management Interface Signals (MDC, MDIO)
        1. 2.2.6.1 Read and Check Register Values
          1. 2.2.6.1.1 Extended Register Access
    3. 2.3 MDI Health Checks
      1. 2.3.1 Magnetics
      2. 2.3.2 Probe the MDI Signals
      3. 2.3.3 Link Quality Check
      4. 2.3.4 Compliance
    4. 2.4 MII Health Checks
      1. 2.4.1 MII Check
      2. 2.4.2 RMII Check
    5. 2.5 Loopback and PRBS
      1. 2.5.1 Loopback Modes
      2. 2.5.2 Transmitting and Receiving Packets With the MAC
      3. 2.5.3 Transmitting and Receiving Packets With BIST
  5. 3Summary
  6. 4References

2.2.1 Voltage Checks

DP83826A need to have sufficient power supplied as well as the following decoupling scheme that has been characterized for the device:

  • Per rail
    • 1x 10nF, 1x 100nF, 1x 1uF, 1x 10uF
Power Supply Decoupling RecommendationFigure 2-1 Power Supply Decoupling Recommendation

Power up the device and perform DC measurement of the supplies as close to the pin as possible. Confirm that each measurement is within the limits defined in Table 2-1.

Table 2-1 Recommended Operating Conditions
MinTypMaxUnit
AVDD3V333.33.6V
VDDIO (3.3V)33.33.6
VDDIO (1.8V)1.621.81.98