SPRADK4 October   2024 AM263P2-Q1 , AM263P4 , AM263P4-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2OptiFlash Technology
  6. 3OptiFlash Hardware Accelerators
    1. 3.1 RL2_OF Accelerators
      1. 3.1.1 RL2-Flash Cache
      2. 3.1.2 FLC - Fast Local Copy (Image Download Acceleration)
      3. 3.1.3 Region-Based Address Translation (RAT)
    2. 3.2 FSS Accelerators
      1. 3.2.1 On-the-fly-Safety Engine
      2. 3.2.2 On-the-fly-Security Engine
      3. 3.2.3 FOTA HW Engine
  7. 4OptiFlash SW Tooling
    1. 4.1 Smart Placement
    2. 4.2 Smart Layout
    3. 4.3 Optishare
    4. 4.4 Dynamic Overlay
  8. 5Benchmarks and Performance Data
  9. 6Usecases for OptiFlash Accelerators
  10. 7Getting Started With OptiFlash
  11. 8Conclusion

FOTA HW Engine

For emerging applications like ADAS, Automotive Gateway, Industry Automation, Firmware Over the Air (FOTA) updates are required to address multiple features, security vulnerabilities, bug fixes, and so forth. In order to meet the system cost, a single flash solution is required, which would typically require to pause the application execution till the update (firmware download) is completed. In past, these updates were scheduled during system start up (key-on) or system shutdown (key-off). To reduce overall down-time of system during update (unlike cell phone), the new requirement is to update new firmware/software image during concurrent system operation, that is, reading from external flash (execute in place (XIP)).

 OptiFlash FOTA HW With RWW
                    Flash Figure 3-3 OptiFlash FOTA HW With RWW Flash

Typical FOTA solutions address this problem by performing read while write in software. But without any hardware support, it becomes complex as it requires complex synchronization across threads/CPUs, increasing the XIP downtime. With the OptiFlash FOTA Hardware Accelerator IP, as shown in OptiFlash FOTA HW with RWW Flash, it is possible to further reduce the XIP downtime and be able to perform concurrent XIP read(s) while FOTA update happens in background, with zero software overheads on MCU. Primarily this is useful when using Read While Write (RWW) capable Flash memory with dual/multiple banks, which allows reads while write/erase is in progress (which can take >1ms to complete) in a different bank.