SPRUIW3 October 2021 TMS320F280033 , TMS320F280034 , TMS320F280034-Q1 , TMS320F280036-Q1 , TMS320F280036C-Q1 , TMS320F280037 , TMS320F280037-Q1 , TMS320F280037C , TMS320F280037C-Q1 , TMS320F280038-Q1 , TMS320F280038C-Q1 , TMS320F280039 , TMS320F280039-Q1 , TMS320F280039C , TMS320F280039C-Q1 , TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1
The ERAD module has a number of changes between F28004x and F28003x as highlighted in Table 3-13
| Module | Category | F28004x | F28003x | Notes |
|---|---|---|---|---|
| ERAD | Features | - | Event Masking and Exporting | EBC Unit on F28003x supports event OR/AND, maskingand exporting |
| - | Cumulative Mode | SEC Unit on F28003x supports a cummulative mode over several start/stop events | ||
| - | CRC Unit | F28003x has CRC units to monitor CPU buses and compute CRC when self-test code is executed | ||
| 32 Event Selector Options | 128 Event Selector Options | Connections to ADC, CMPSS, EPWM and other sources have been added to F28003x | ||
| Registers | - | GLBL_NMI_CTL | Global Debug NMI Control | |
| - | GLBL_EVENT_AND_MASK | Global Bus Comparator Event AND Mask Register | ||
| - | GLBL_EVENT_OR_MASK | Global Bus Comparator Event OR Mask Register | ||
| - | GLBL_AND_EVENT_INT_MASK | Global AND Event Interrupt Mask Register | ||
| - | GLBL_OR_EVENT_INT_MASK | Global OR Event Interrupt Mask Register | ||
| - | CTM_INPUT_SEL_2 | Counter Input Select Extension Register | ||
| - | CTM_INPUT_COND | Counter Input Conditioning Register | ||
| - | CRC_GLOBAL_CTRL | CRC Global Control Register | ||
| - | CRC_CURRENT | Reads Current CRC Value | ||
| - | CRC_SEED | CRC Seed Register | ||
| - | CRC_QUALIFIER | CRC Compute Qualification Register |