DLPU094 July 2020 DLP5530S-Q1
Table 6 summarizes the monitoring and diagnostic features available in the chipset. Table 5 describes each column in Table 6. TI recommends the use of all mechanisms listed, unless one mechanism must be chosen instead of another. For example, the Video Tell-Tale Checksum and Video Frame Counter Checksum cannot be operated simultaneously so one must be selected.
| Functional Safety Mechanism | Description |
|---|---|
| Safety Mechanism Name | The full name of this safety mechanism. |
| Safety Mechanism Operation Interval | The time interval at which the mechanism or test is re-executed after a pass |
| Test Execution Time | Time required for mechanism to definitively determine pass or fail condition. |
| Action on Detected Fault | The response that this safety mechanism takes when an error is detected. |
| Time to Report | Typical time required for safety mechanism to indicate a detected fault to the system or execute an emergency shutdown. Additional time may be required for host to read error condition from the chipset. |
| Safety Mechanism ID | Safety Mechanism Name | Safety Mechanism Operation Interval | Test Execution Time | Time to Report | Action on Detected Fault |
|---|---|---|---|---|---|
| SM_1 | Video Source Loss Detection | 1 Video Frame | 1 video frame | TBD | Stay in standby or switch to alternate source |
| SM_2 | Video Tell-Tale Checksum | 1 Video Frame | 1 video frame | TBD | Configurable:
|
| SM_3 | Video Frame Counter Checksum | 1 Video Frame | 1 video frame | TBD | Configurable:
|
| SM_4 | Average Picture Level | 1 Video Frame | 1 video frame | TBD | Configurable:
|
| SM_5 | Front-End Functional Test | 1 Driving Cycle | 33 ms | TBD | Stay in standby and log error |
| SM_6 | Back-End Functional Test | 1 Driving Cycle | 16 ms | TBD | Stay in standby and log error |
| SM_7 | DLPC230S-Q1 Memory BIST | 1 Driving Cycle | 47 ms | TBD | Stay in standby and log error |
| SM_8 | Frame Buffer Switch Watchdog | 1 Video Frame | 9x video frame time | TBD | Emergency shutdown and Log Error |
| SM_9 | DMD High Speed Interface Training | 1 Video Frame | 8x video frame time | TBD | Log Error |
| SM_10 | DMD Low Speed Interface Test | 1 Video Frame | 1 video frame time | TBD | Log Error |
| SM_11 | DMD Memory Test | 1 Driving Cycle | 21 ms | TBD | Stay in standby and log error |
| SM_12 | DMD Reset Instruction Watchdog | 1 DMD Mirror Transition Interval | 9x video frame time | TBD | Emergency shutdown and log error |
| SM_13 | DMD Clock Monitor | ||||
| SM_14 | Host Command CRC | 1 Host SPI Command Transaction | 1 SPI Command Time. Timing depends on SPI frequency | TBD | Log Error |
| SM_15 | Loss of Dimming Command Test | Software Configurable | Software Configurable | TBD | Emergency shutdown and log error |
| SM_16 | TPS99000S-Q1 Interface Signal Connection Test | 1 Driving Cycle | 3 ms | TBD | Stay in standby and log error |
| SM_17 | DLPC230S-Q1 to TPS99000S-Q1 SPI Byte-Wise Parity | 1 DLPC230S-Q1 to TPS99000S-Q1 command transaction | 1.1 micro-seconds (4 SPI packet transactions at 30MHz; initial transaction + three re-tries) | TBD | Emergency Shutdown and Log Error |
| SM_18 | DLPC230S-Q1 to TPS99000S-Q1 ADC Interface SPI Parity | 1 DLPC230S-Q1 to TPS99000S-Q1 AD3 transaction | 4.1 micro-seconds (4 transactions at 30MHz; initial transaction + three re-tries) | TBD | Emergency Shutdown and Log Error |
| SM_19 | TPS99000S-Q1 Password Protected Register Space | 1 DLPC230S-Q1 to TPS99000S-Q1 Register Write | 4x video frame time | TBD | |
| SM_20 | TPS99000S-Q1 Register Checksum | 1 video frame | 1 video frame to detect and correct
4 video frames to detect persistent error |
TBD | Emergency Shutdown and Log Error |
| SM_21 | DAC to ADC Loopback Test | 1 Driving Cycle | 27 ms | TBD | Stay in standby and log error |
| SM_22 | Photo Feedback Monitor | 1 Video Frame | Software Configurable | TBD | Depends on failure condition:
|
| SM_23 | Flash Table Transport CRC | Every Data Transfer from Flash | 1 video frame | TBD | Re-load data and Log Error |
| SM_24 | DLPC230S-Q1 Memory ECC | Continuous | TBD |
|
|
| SM_25 | DLPC230S-Q1 Memory BIST | 1 Driving Cycle | TBD | Stay in standby and log error | |
| SM_26 | Flash Data Verification | 1 Driving Cycle | 42 micro-seconds / Kbyte of flash data | TBD | Stay in standby and log error |
| SM_27 | Periodic Refresh | 1 Video Frame or less | N/A | N/A | N/A |
| SM_28 | Boot ROM CRC | 1 Driving Cycle | Stay in Boot and Log Error | ||
| SM_29 | TPS99000S-Q1 clock ratio monitor | 1 video frame time | 1 video frame | TBD | Log Error |
| SM_30 | DLPC230S-Q1 Processor Watchdog (WD1) | 72 ms | 128 ms | TBD | HOST_IRQ and system reset |
| SM_31 | DLPC230S-Q1 Sequencer Watchdog (WD2) | 1 video frame | 7x video frame time | TBD | Emergency Shutdown and Log Error |
| SM_32 | Sequencer Instruction Read Watchdog | Every sequencer instruction read, typically < 200 micro-seconds | 9x video frame time | TBD | Emergency Shutdown and Log Error |
| SM_33 | TPS99000S-Q1 DLPC230S-Q1 Real-Time Voltage Monitors | Continuous | 52 micro-seconds | TBD | Emergency Shutdown |
| SM_34 | TPS99000S-Q1 DMD Voltage Monitors | Continuous | 52 micro-seconds | TBD | Emergency Shutdown |
| SM_35 | TPS99000S-Q1 Input Voltage Monitor | Continuous | 52 micro-seconds | TBD | Emergency Shutdown |
| SM_36 | TPS99000S-Q1 Internally Generated Voltage Monitors | Continuous | Immediately | TBD | Emergency Shutdown |
| SM_37 | DLPC230S-Q1 DMD Voltage Monitor | 1 video frame | 1 video frame | TBD | Emergency Shutdown and Log Error |
| SM_38 | DLPC230S-Q1 System Voltage Monitor | 1 video frame | 1 video frame | TBD | Log Error |