DLPU094 July   2020 DLP5530S-Q1

 

  1.   1
  2.   2
    1.     3
    2.     4
    3.     5
    4.     6
      1.      7
    5.     8
      1.      9
      2.      10
        1.       11
        2.       12
        3.       13
      3.      14
    6.     15
    7.     16
      1.      17
        1.       18
        2.       19
      2.      20
      3.      21
        1.       22
          1.        23
          2.        24
          3.        25
          4.        26
        2.       27
          1.        28
          2.        29
            1.         30
            2.         31
            3.         32
            4.         33
            5.         34
    8.     35
  3.   36

7.3.2.2.5 Voltage Monitors

The following voltage monitors are used to make sure that the device operating voltages of the chipset are within an acceptable range

  • [SM_33] TPS99000S-Q1 DLPC230S-Q1 Real-Time Voltage Monitors:: The TPS99000S-Q1 monitors the 1.1V, 1.8V, 3.3V, and VMAIN power supplies to the DLPC230S-Q1. These voltages are not generated by the TPS99000S-Q1. If any these voltages drop below the thresholds specified in the TPS99000S-Q1 datasheet, the TPS99000S-Q1 asserts the PARK_Z signal low. This initiates a hardware park routine within the DLPC230S-Q1, meaning no software is executed in order for this routine to execute. The hardware park routine disables LEDs and video output to the DMD. After the routine is completed, the TPS99000S-Q1 asserts RESET_Z low, which puts the DLPC230S-Q1 into reset.
  • [SM_34] TPS99000S-Q1 DMD Voltage Monitors:The TPS99000S-Q1 generates and monitors the DMD VOFFSET, VBIAS, and VRESET voltages. Hardware monitors within the TPS99000S-Q1 detect if these voltages are outside the acceptable range and assert the PARK_Z signal low. This initiates a hardware park routine within the DLPC230S-Q1, meaning no software is executed in order for this routine to execute. The hardware park routine disables LEDs and video output to the DMD. After the routine is completed, the TPS99000S-Q1 asserts RESET_Z low, which puts the DLPC230S-Q1 into reset.
  • [SM_35] TPS99000S-Q1 Input Voltage Monitor: The TPS99000S-Q1 monitors input voltages shown in the list below. If any of these voltages drops below the threshold, the TPS99000S-Q1 asserts PARK_Z signal low. This initiates a hardware park routine within the DLPC230S-Q1, meaning no software is executed in order for this routine to execute. The hardware park routine disables LEDs and video output to the DMD. After the routine is completed, the TPS99000S-Q1 asserts RESET_Z low, which puts the DLPC230S-Q1 into reset.
    • 3.3V Inputs: AVDD, VDD_IO, DVDD
    • 6V Inputs:VIN_DRST, VIN_LDOT_5V, VIN_LDOA_3P3V, VIN_LDOT_3P3V, DRVR_PWR
  • [SM_36] TPS99000S-Q1 Internally Generated Voltage Monitors:The TPS99000S-Q1 generates and monitors several internally generated voltages (3V for ADCs and TIAs, and -8V for the photo-diode reverse biasing). Hardware monitors within the TPS99000S-Q1 detect if these voltages are outside the acceptable range and assert the PARK_Z signal low. This initiates a hardware park routine within the DLPC230S-Q1, meaning no software is executed in order for this routine to execute. The hardware park routine disables LEDs and video output to the DMD. After the routine is completed, the TPS99000S-Q1 asserts RESET_Z low, which puts the DLPC230S-Q1 into reset.
  • [SM_37] DLPC230S-Q1 DMD Voltage Monitor: Every video frame the main application takes ADC measurements of the DMD voltages—VOFFSET, VBIAS, and VRESET. If these are not within the acceptable range, and error is logged and emergency shutdown is executed.
  • [SM_38] DLPC230S-Q1 System Voltage Monitor: Every video frame the main application takes ADC measurements of several system voltages. These include the DLPC230S-Q1 voltages (P1P1V, P1P8V, P3P3V), TPS99000S-Q1 voltages (DVDD, ADC_VREF, LDOT_M8, DRVR_PWR), and VMAIN. The thresholds for VMAIN are flash configurable. Upon failure, an error is logged.