SBAA669 February   2025 ADC3548 , ADC3549 , ADC3568 , ADC3569 , ADC3648 , ADC3649 , ADC3664 , ADC3668 , ADC3669

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2AAF Tradeoffs at Low Frequency and Low Sampling Rate
  6. 3AAF Tradeoffs at Low Frequency and Higher Sampling Rate
  7. 4The Power of the ADC's Integrated DDC
  8. 5Summary
  9. 6References

AAF Tradeoffs at Low Frequency and Higher Sampling Rate

Now let us turn this around and use a higher sampling rate, for example, a 500MSPS ADC, to help relax the AAF challenge as previously discussed. What we gain here is a wider Nyquist zone, which therefore, co-locates those pesky harmonic signals, HD2/HD3 within the same Nyquist zone. They are effectively not farther away, but now they cannot be aliased back within the band of interest due to their co-location. This simply allows for relaxation of the AAF design from a 9th order to a 4th order filter as shown in Figure 3-1.

 500MSPS AAF and DR ExampleFigure 3-1 500MSPS AAF and DR Example

Using a simple filter modeling tool again, we now only need to design and create a 4th order filter to get close to that -85dB SFDR requirement. See Figure 3-2 for the simulated frequency response plot of the filter design. This is a 4th order Butterworth topology, centered at 94MHz, with 10MHz (or +/-5MHz) of passband.

 Simulated Response of 4th Order, 94MHz
                    Butterworth Filter Topology With 10MHz PassbandFigure 3-2 Simulated Response of 4th Order, 94MHz Butterworth Filter Topology With 10MHz Passband

As the number of components decrease, the filter design becomes more realizable and repeatable as there are less components tolerances deviating against each other with respect to their differential counterpart, see Figure 3-3. Now there are less than half the number of components is required now to do the job, and sufficiently reject the HD2/HD3 harmonics. This smaller filter design now uses a total footprint of 530 mil x 200 mils, which is again, roughly half the size as the equivalent differential filter design, see Figure 3-4.

 4th Order Simulated Filter, SynthesizedFigure 3-3 4th Order Simulated Filter, Synthesized
 4th Order Simulated Filter, PCB or Layout
                    MockupFigure 3-4 4th Order Simulated Filter, PCB or Layout Mockup

Again, as mentioned previously, Figure 3-4 shows a differential filter approach, which is a commonly used implementation between an amplifier and ADC interface. If using a single-ended AAF approach, this can half reduces the number of components needed for the AAF design and balun interface to the ADC.