SBAU430 April   2025 DAC39RF12

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents (Required Equipment)
  6. 2Hardware
    1. 2.1 Setup Procedure
      1. 2.1.1  Installing the DAC39RF12EVM Configuration GUI Software
        1. 2.1.1.1 Installing & Setting Up Vivado Lab Tools
      2. 2.1.2  Connect the DAC39RF12EVM and TSW14J59EVM
      3. 2.1.3  Connect the Power Supplies to the Boards (Power Off)
      4. 2.1.4  Connect the Spectrum Analyzer to the EVM
      5. 2.1.5  Turn On the TSW14J59EVM Power and Connect to the PC
      6. 2.1.6  Turn On the DAC39RF12EVM Power Supplies and Connect to the PC
      7. 2.1.7  Turn On the Signal Generators
      8. 2.1.8  Launching the DAC39RF12EVM GUI and Programing the DAC EVM - JMODE 0
      9. 2.1.9  Launching the DAC39RF12EVM GUI and Programing the DAC EVM - JMODE 1
      10. 2.1.10 Launching the DAC39RF12EVM GUI and Programing the DAC EVM - JMODE 3
    2. 2.2 Evaluation Board Details: Analog Outputs
    3. 2.3 FMC Signal Routing
  7. 3References
    1. 3.1 Trademarks

Features

  • Two balun-coupled output networks per DAC output allowing singled ended signal evaluation.
  • A 3MHz to 6GHz low band balun for 1st Nyquist evaluation.
  • A 1.8GHz to 18GHz high band balun for 2nd/3rd Nyquist evaluation.
  • A LMK04828 clock distribution chip for distributing FPGA reference clocks as well as SYSREF for subclass 1 operation.
  • A balun-coupled clock input network to test the DAC performance with an external low-noise clock source.
  • An FMC+ with High-speed serial data connections for full JESD204C testing of all 16 lanes.
  • A USB to serial chip to allow programming of the DAC/LMK with a simple USB connection.
  • The ability to program the DAC/LMK from an FPGA using the FMC+ connector.(1)
  • Device register programming through USB connector and FTDI USB-to-SPI bus translator with option to program from FGPA using SPI through FMC+ connector
1. To improve signal routing quality, serial lane polarity is inverted with respect to the standard FMC VITA-57 signal mapping. Signal mapping and polarity is shown in Section 2.3).