SBAU466B October   2024  – October 2025

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Required Equipment
    2. 2.2 Setup Procedure
      1. 2.2.1  Installing the High Speed Data Converter (HSDC) Pro Software
      2. 2.2.2  Installing the DAC39RF10EVM Configuration GUI Software
      3. 2.2.3  Connect the TRF1108-DAC39RFEVM and TSW14J59EVM
      4. 2.2.4  Connect the Power Supplies to the Boards (Power Off)
      5. 2.2.5  Connect the Spectrum Analyzer to the EVM
      6. 2.2.6  Turn On the TSW14J59EVM Power and Connect to the PC
      7. 2.2.7  Turn On the TRF1108-DAC39RFEVM Power Supplies and Connect to the PC
      8. 2.2.8  Turn On the Signal Generator RF Outputs
      9. 2.2.9  Launch the DAC39RF10EVM GUI and Program the DAC EVM
      10. 2.2.10 Programming the NCO
        1. 2.2.10.1 SPIDAC (NCO only) Operation
      11. 2.2.11 Launch the HSDC pro Software and Load the FPGA Image to the TSW14J59EVM
    3. 2.3 Device Configuration
      1. 2.3.1 Supported JESD204C Device Features
      2. 2.3.2 Tab Organization
      3. 2.3.3 Register Map and Console Control
    4. 2.4 Troubleshooting the TRF1108-DAC39RFEVM
    5. 2.5 Customizing the EVM for Optional Clocking Support
      1. 2.5.1 LMX->DACCLK | LMX/LMK-> FPGA Option (Default)
      2. 2.5.2 EXT->DACCLK | LMX/LMK-> FPGA Clocking Option
      3. 2.5.3 EXT->DACCLK | LMK-> FPGA Clocking Option
    6. 2.6 Signal Routing
    7. 2.7 Jumpers and LEDs
  8. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  9. 4Additional Information
    1. 4.1 Trademarks
  10. 5References
    1. 5.1 Technical Reference Documents
    2. 5.2 TSW14J59EVM Operation
  11. 6Revision History

2.6 Signal Routing

The signal routing details for the TRF1108-DAC39RFEVM are shown in Table 2-6.

Table 2-6 TRF1108-DAC39RFEVM Signal Routing
JESD204C

Inputs

FMC(+) PiFMC(+) Signal Names(1)
Lane0A38,A39DP5_C2M_INV
Lane1B36,B37DP6_C2M_INV
Lane2B32,B33DP7_C2M_INV
Lane3A34,A35DP4_C2M_INV
Lane4Y30,Y31DP13_C2M_INV
Lane5A30,A31DP3_C2M_INV
Lane6Z28,Z29DP12_C2M_INV
Lane7B28,B29DP8_C2M_INV
Lane8Y6,Y7DP21_C2M_INV
Lane9C2,C3DP0_C2M_INV
Lane10Z8,Z9DP20_C2M_INV
Lane11A22,A23DP1_C2M_INV

Lane12

Z24,Z25DP10_C2M_INV
Lane13B25,B26DP9_C2M_INV
Lane14Y26,Y27DP11_C2M_INV
Lane15A26,A27DP2_C2M_INV
(1) Red items with _INV in the signal name are inverted with respect to standard FMC polarity.