The fraction of the signal that is seen at the output will depend on the input signal frequency, the values of the resistors in the feedback network, the output load, the parasitic input capacitance and the output impedance of the amplifier when it is disabled. Consider an inverting amplifier circuit with a resistive load as an example. For this circuit, the voltage divider created by R_i+R_f and R_Load in parallel with R_SHDN will set the maximum amount of signal from V_IN that can be seen at V_OUT. Note that R_SHDN is typically very large, such that it can be ignored for this calculation. At high frequencies, the output impedance of the op amp itself will start to roll off, causing a low pass filter behavior at the output.

To see these effects simulated, consider an example of an inverting amplifier circuit in a gain of –1 V/V using the TLV9002S in shutdown mode. The circuit can be modeled using the setup in Figure 6-1. Set R_i and R_f to 1 kΩ and R_Load to 10 kΩ. From the TLV9002S data sheet specifications, C_ID is 1.5 pF, C_CM is 5 pF, C_SHDN is 2 pF, and R_SHDN is 10 GΩ. Now an AC simulation is run to measure the response of the circuit. The result is shown in Figure 6-2.

The simulation result shows a corner frequency of 19.48 MHz and a slope of –40 dB/dec at high frequencies due to the double pole. Notice that at low frequencies the input signal is attenuated by the ratio set by the sum of the feedback resistors and the load resistor. These form a DC path from input to output. Performing a voltage division calculation will yield an expected low frequency gain of 833 mV/V, or –1.58 dB. This demonstrates an important design consideration. This configuration may not significantly block or attenuate input signals from reaching the output while the amplifier is disabled. Thus, it is important to ensure that the output signal level during op amp shutdown is appropriate for the application.