SBOS584F November   2011  – September 2026 OPA180 , OPA2180 , OPA4180

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information: OPA180
    5. 6.5 Thermal Information: OPA2180
    6. 6.6 Thermal Information: OPA4180
    7. 6.7 Electrical Characteristics: VS = ±2V to ±18V (VS = 4V to 36V)
    8. 6.8 Typical Characteristics: Table of Graphs
    9. 6.9 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Operating Characteristics
      2. 7.3.2 EMI Rejection
      3. 7.3.3 Phase-Reversal Protection
      4. 7.3.4 Capacitive Load and Stability
      5. 7.3.5 Electrical Overstress
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Bipolar ±10V Analog Output from a Unipolar Voltage Output DAC
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Component Selection
        3. 8.2.1.3 Application Curves
      2. 8.2.2 Discrete INA + Attenuation
      3. 8.2.3 RTD Amplifier
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.7 Electrical Characteristics: VS = ±2V to ±18V (VS = 4V to 36V)

at TA = 25°C, RL = 10kΩ connected to VS / 2, and VCOM = VOUT = VS / 2, unless otherwise noted.
PARAMETERCONDITIONSMINTYPMAXUNIT
OFFSET VOLTAGE
VIOInput offset voltage1575μV
dVIO/dTInput offset voltage driftTA = –40°C to +125°C0.10.35μV/°C
PSRRPower supply rejection ratioVS = 4V to 36V,
VCM = VS / 2		0.10.5μV/V
TA = –40°C to +125°C,
VS = 4V to 36V, VCM = VS / 2		0.5μV/V
Long-term stability4(1)μV
Channel separation, DC1μV/V
INPUT BIAS CURRENT
IIBInput bias currentOPA2180±0.25±1.5nA
OPA2180: TA = –40°C to +105°C±18nA
OPA180, OPA4180±0.25±1.7nA
OPA180, OPA4180: TA = –40°C to +125°C±18nA
IIOInput offset currentOPA2180±0.5±3nA
OPA2180: TA = –40°C to +105°C±6nA
OPA180, OPA4180±3.4nA
OPA180, OPA4180: TA = –40°C to +125°C±6nA
NOISE
Input voltage noiseƒ = 0.1Hz to 10Hz0.25μVPP
enInput voltage noise densityƒ = 1kHz10nV/√ Hz
inInput current noise densityƒ = 1kHz10fA/√ Hz
INPUT VOLTAGE RANGE
VCMCommon-mode voltage rangeV–(V+) – 1.5V
CMRRCommon-mode rejection ratio(V–) < VCM < (V+) – 1.5V104114dB
TA = –40°C to +125°C,
(V–) + 0.5V < VCM < (V+) – 1.5V		100104dB
INPUT IMPEDANCE
zidDifferential100 || 6MΩ || pF
zicCommon-mode6 || 9.51012 Ω || pF
OPEN-LOOP GAIN
AOLOpen-loop voltage gain(V–) + 500mV < VO < (V+) – 500mV
RL = 10kΩ		110120dB
TA = –40°C to +125°C
(V–) + 500mV < VO < (V+) – 500mV,
RL = 10kΩ		104114dB
FREQUENCY RESPONSE
GBWGain bandwidth product2MHz
SRSlew rateG = 10.8V/μs
tsSettling time0.1%VS = ±18V, G = 1, 10V step22μs
0.01%VS = ±18V, G = 1, 10V step30μs
torOverload recovery timeVIN × G = VS1μs
THD+NTotal harmonic distortion + noiseƒ = 1kHz, G = 1, VOUT = 1VRMS0.0001%
OUTPUT
Voltage output swing from railNo load818mV
RL = 10kΩ250300mV
TA = –40°C to +125°C
RL = 10kΩ		325360mV
IOSShort-circuit current±18mA
roOutput resistance (open loop)ƒ = 2MHz, IO = 0mA120Ω
CLOADCapacitive load drive1nF
POWER SUPPLY
VSOperating voltage range±2 (or 4)±18 (or 36)V
IQQuiescent current (per amplifier)450525μA
TA = –40°C to +125°C
IO = 0mA		600μA
TEMPERATURE
Specified range–40105°C
Operating range–40105°C
(1) 1000-hour life test at 125°C demonstrated randomly distributed variation in the range of measurement limits, or approximately 4μV.