SBOSAK8 March   2025 INA950-SEP

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Amplifier Input Common-Mode Range
      2. 6.3.2 Input-Signal Bandwidth
      3. 6.3.3 Low Input Bias Current
      4. 6.3.4 Low VSENSE Operation
      5. 6.3.5 Wide Fixed-Gain Output
    4. 6.4 Device Functional Modes
      1. 6.4.1 Unidirectional Operation
      2. 6.4.2 High Signal Throughput
  8. 7 Application and Implementation
    1. 7.1 Application Information
      1. 7.1.1 RSENSE and Device Gain Selection
      2. 7.1.2 Input Filtering
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Overload Recovery With Negative VSENSE
      3. 7.2.3 Application Curve
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Examples
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information
    1. 10.1 Mechanical Data

5.5 Electrical Characteristics

at TA = 25°C, VS = 5V, VSENSE = VIN+ – VIN– = 0.5V / Gain, VCM = VIN– = 48V (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
CMRR Common-mode rejection ratio VCM = 2.7V to 80V, TA = –55°C to +125°C 140 160 dB
f = 50kHz 85
Vos Offset voltage, input referred ±6 ±25 µV
dVos/dT Offset voltage drift TA = –55°C to +125°C ±0.05 µV/℃
PSRR Power supply rejection ratio, input referred VS = 2.7V to 5.5V, TA = –55°C to +125°C ±0.05 ±0.5 µV/V
IB Input bias current IB+, VSENSE = 0mV,  VCM = 80V, TA = –55°C to +125°C 10 20 30 µA
IB–, VSENSE = 0mV, VCM = 80V, TA = –55°C to +125°C 10 20 30 µA
OUTPUT
G Gain 20 V/V
Gain error GND + 50mV ≤ VOUT ≤ VS – 200mV ±0.02 ±0.1 %
Gain error drift TA = –55°C to +125°C ±1.5 ppm/°C
Nonlinearity error 0.01 %
Maximum capacitive load No sustained oscillations, no isolation resistor 500 pF
VOLTAGE OUTPUT
Swing to VS power supply rail RLOAD = 10kΩ, TA = –55°C to +125°C VS – 0.07 VS – 0.2 V
Swing to ground RLOAD = 10kΩ, VSENSE = 0V, TA = –55°C to +125°C 0.005 0.025 V
FREQUENCY RESPONSE
BW Bandwidth CLOAD = 5pF, VSENSE = 200mV 1100 kHz
SR Slew rate 2 V/µs
Settling time VOUT = 4V ± 0.1V step, output settles to 0.5% 9 µs
VOUT = 4V ± 0.1V step, output settles to 1% 5
NOISE
Ven Voltage noise density 50 nV/√Hz
POWER SUPPLY
VS Supply voltage TA = –55°C to+125°C 2.7 5.5 V
IQ Quiescent current 370 500 µA
TA = –55°C to +125°C 600