SBOSAN4A August   2025  – December 2025 PGA848

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Gain Control
      2. 7.3.2 Input Protection
      3. 7.3.3 Using the Output Difference Amplifier to Shape Noise
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Linear Operating Input Range
      2. 8.1.2 Current Consumption with Differential Inputs
    2. 8.2 Typical Applications
      1. 8.2.1 Driving a Single-Ended Input SAR ADC
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 PSpice® for TI
        2. 9.1.1.2 TINA-TI™ Simulation Software (Free Download)
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 Receiving Notification of Documentation Updates
    4. 9.4 Support Resources
    5. 9.5 Trademarks
    6. 9.6 Electrostatic Discharge Caution
    7. 9.7 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

10 Revision History

Changes from Revision * (August 2025) to Revision A (December 2025)

  • Updated data sheet status from Advanced Information to Production Data Go
  • Changed common mode input impedance from 7pF to 4.4pFGo
  • Changed differential input voltage limits from ±20V to ±16VGo
  • Modified CMRR for G = 2, 10, and 20 from 81dB, 96dB, and 102dB to 80dB, 95dB, and 100dB respectivelyGo
  • Added the Voltage Noise sectionGo
  • Modified Nonlinearity test conditions for G=0.5 from VOUT=10V to 8VGo
  • Added the differential gain nonlinearity parameter valuesGo
  • Changed the BW parameter value for G=10,20 from 4.2MHz to 5MHzGo
  • Modified slew rate test conditions for G=0.5 from VOUT=10V to 8VGo
  • Added Slew Rate, and Gain Switching Time parameter values, and Settling Time parameterGo
  • Added the THD and HD2, and HD3 parametersGo
  • Changed IQ_input parameter typical value from 3mA to 3.2mA, and maximum value from 3.7mA to 3.9mAGo
  • Changed IQ_input over temperature parameter maximum value from 4.5mA to 4.9mAGo
  • Added all Typical Characteristics figures apart from Gain Error, Offset and Offset Drift Distribution, and Gain vs. Frequency, which existed in the previous versionGo
  • Modified the gain settings block diagram to have current sources at the input instead of resistors.Go
  • Updated Input common mode vs. output differential voltage curves for G=0.5, G=1, and G=2Go
  • Added current consumption with differential inputs sectionGo
  • Changed the opamp used in SAR ADC circuit from OPA192 to OPA387, also reflected in the application circuit figure.Go
  • Changed input filter and kickback filter for SAR ADC circuit, reflected in the application circuit figure.Go
  • Added the results table of the SAR ADC application circuit.Go
  • Updated the caution statement to refer to typical characteristics sectionGo
DATE REVISION NOTES
August 2025 * Initial Release

Changes from , to , (from Revision () to Revision ())

  • Changed common mode input impedance from 7pF to 4.4pFGo
  • Changed differential input voltage limits from ±20V to ±16VGo
  • Modified CMRR for G = 2, 10, and 20 from 81dB, 96dB, and 102dB to 80dB, 95dB, and 100dB respectivelyGo
  • Added the Voltage Noise sectionGo
  • Modified GE maximum values for different gains from 0.03% to 0.035%, from 0.04% to 0.045%, and from 0.05% to 0.055% respectivelyGo
  • Modified Nonlinearity test conditions for G=0.5 from VOUT=10V to 8VGo
  • Added the differential gain nonlinearity parameter valuesGo
  • Changed the BW parameter value for G=10,20 from 4.2MHz to 5MHzGo
  • Modified slew rate test conditions for G=0.5 from VOUT=10V to 8VGo
  • Added Slew Rate, and Gain Switching Time parameter values, and Settling Time parameterGo
  • Added the THD and HD2, and HD3 parametersGo
  • Changed IQ_input parameter typical value from 3mA to 3.2mA, and maximum value from 3.7mA to 3.9mAGo
  • Changed IQ_input over temperature parameter maximum value from 4.5mA to 4.9mAGo
  • Modified the gain settings block diagram to have current sources at the input instead of resistors.Go
  • Added current consumption with differential inputs sectionGo
  • Changed the opamp used in SAR ADC circuit from OPA192 to OPA387, also reflected in the application circuit figure.Go
  • Changed input filter and kickback filter for SAR ADC circuit, reflected in the application circuit figure.Go
  • Added the results table of the SAR ADC application circuit.Go
  • Updated the caution statement to refer to typical characteristics sectionGo