SBVS458A January 2025 – April 2025 TPS7B4261-Q1
PRODUCTION DATA
Dropout voltage (VDO) is defined as VIN – VOUT when the pass transistor is fully on. VIN is the input voltage and VOUT is the output voltage. This condition arises when the input voltage falls to a point where the error amplifier drives the gate of the pass transistor to the rail. During this condition, there is no remaining headroom for the control loop to operate. At this operating point, the pass transistor is driven fully on. Dropout voltage directly specifies the minimum VIN − VOUT differential the device requires to maintain a regulated output voltage. If the input voltage falls to less than the nominal output regulation, then the output voltage follows, minus the dropout voltage (VDO).
In dropout mode, the output voltage is no longer regulated, and transient performance is severely degraded. The device loses PSRR, and load transients potentially cause large output voltage deviation.
For a CMOS regulator, the dropout voltage is determined by the drain-source on-state resistance (RDS(ON)) of the pass transistor. Therefore, if the linear regulator operates at less than the maximum rated output current (IRATED), the dropout voltage for that current scales accordingly. IRATED is listed in the Recommended Operating Conditions table. The following equation calculates the RDS(ON) of the device.
