SCES222R April   1999  – August 2026 SN74LVC1G86

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics, CL = 15pF
    7. 5.7 Switching Characteristics, CL = 30pF or 50pF
    8. 5.8 Operating Characteristics
    9. 5.9 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 7.3.2 Standard CMOS Inputs
      3. 7.3.3 Clamp Diodes
      4. 7.3.4 Partial Power Down (Ioff)
      5. 7.3.5 Over-voltage Tolerant Inputs
    4. 7.4 Function Table
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

5.6 Switching Characteristics, CL = 15pF

over recommended operating free-air temperature range (unless otherwise noted) (see Figure 6-1)
PARAMETER FROM
(INPUT)		 TO
(OUTPUT)		 TEST CONDITIONS VCC = 1.8V
± 0.15V		 VCC = 2.5V
± 0.2V		 VCC = 3.3V
± 0.3V		 VCC = 5V
± 0.5V		 UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
tpd A or B Y TA = –40°C to +85°C 2.1 9.1 1 4.9 0.6 4 0.8 3.3 ns