SCES424O
January 2003 – June 2025
SN74LVC1G3157
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
Thermal Information
5.3
ESD Ratings
5.4
Recommended Operating Conditions
5.5
Electrical Characteristics
5.6
Switching Characteristics 85C (DBV, DCK)
5.7
Switching Characteristics 125C (DBV, DCK)
5.8
Switching Characteristics 85C (YZP, DSF. DTB. DRY, DRL)
5.9
Switching Characteristics 125C (YZP, DSF. DTB. DRY, DRL)
5.10
Analog Channel Specifications
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
1
Features
ESD protection exceeds JESD 22
2000V Human Body Model (A114-A)
1000V Charged-Device Model (C101)
1.65V to 5.5V V
CC
operation
Qualified for 125°C operation
Specified break-before-make switching
Rail-to-rail signal handling
Operating frequency typically 340MHz at room temperature
High speed, typically 0.5ns (V
CC
= 3V, C
L
= 50pF)
Low ON-state resistance, typically approximately 6Ω (V
CC
= 4.5V)
Latch-up performance exceeds 100mA Per JESD 78, class II