5-V, 2:1 (SPDT), 1-channel general-purpose analog switch

SN74LVC1G3157

ACTIVE

Product details

Configuration 2:1 SPDT Number of channels (#) 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Ron (Typ) (Ohms) 6 ON-state leakage current (Max) (µA) 1 Bandwidth (MHz) 340 Operating temperature range (C) -40 to 125, -40 to 85 Features Break-before-make Input/output continuous current (Max) (mA) 128 Rating Catalog CON (Typ) (pF) 17.3 Supply current (Typ) (uA) 1
Configuration 2:1 SPDT Number of channels (#) 1 Power supply voltage - single (V) 1.8, 2.5, 3.3, 5 Ron (Typ) (Ohms) 6 ON-state leakage current (Max) (µA) 1 Bandwidth (MHz) 340 Operating temperature range (C) -40 to 125, -40 to 85 Features Break-before-make Input/output continuous current (Max) (mA) 128 Rating Catalog CON (Typ) (pF) 17.3 Supply current (Typ) (uA) 1
DSBGA (YZP) 6 2 mm² .927 x 1.427 SOT-23 (DBV) 6 5 mm² 2.9 x 1.6 SOT-5X3 (DRL) 6 2 mm² 1.65 x 1.2 SOT-SC70 (DCK) 6 4 mm² 2 x 2.1 USON (DRY) 6 1 mm² 1.5 x 1 X2SON (DSF) 6 1 mm² 1 x 1 X2SON (DTB) 6 1 mm² 0.8 x 1
  • ESD Protection Exceeds JESD 22
    • 2000-V Human Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)
  • 1.65-V to 5.5-V VCC Operation
  • Qualified For 125°C operation
  • Specified Break-Before-Make Switching
  • Rail-to-Rail Signal Handling
  • Operating Frequency Typically 340 MHz at Room Temperature
  • High Speed, Typically 0.5 ns
    (VCC = 3 V, CL = 50 pF)
  • Low ON-State Resistance, Typically ≉6 Ω
    (VCC = 4.5 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)
  • 1.65-V to 5.5-V VCC Operation
  • Qualified For 125°C operation
  • Specified Break-Before-Make Switching
  • Rail-to-Rail Signal Handling
  • Operating Frequency Typically 340 MHz at Room Temperature
  • High Speed, Typically 0.5 ns
    (VCC = 3 V, CL = 50 pF)
  • Low ON-State Resistance, Typically ≉6 Ω
    (VCC = 4.5 V)
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

This single channel single-pole double-throw (SPDT) analog switch is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G3157 device can handle both analog and digital signals. The SN74LVC1G3157 device permits signals with amplitudes of up to VCC (peak) to be transmitted in either direction.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

This single channel single-pole double-throw (SPDT) analog switch is designed for 1.65-V to 5.5-V VCC operation.

The SN74LVC1G3157 device can handle both analog and digital signals. The SN74LVC1G3157 device permits signals with amplitudes of up to VCC (peak) to be transmitted in either direction.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

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Technical documentation

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Type Title Date
* Data sheet SN74LVC1G3157 Single-Pole Double-Throw Analog Switch datasheet (Rev. L) 16 May 2017
Application note Selecting the Right Texas Instruments Signal Switch (Rev. C) 06 Aug 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Application note Multiplexers and Signal Switches Glossary (Rev. A) 09 Jun 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Use of the CMOS Unbuffered Inverter in Oscillator Circuits 06 Nov 2003
More literature Logic Cross-Reference (Rev. A) 07 Oct 2003
More literature SN74LVC1G3157 and SNS74LVC2G53 SPDT Analog Switches 12 Jun 2003
User guide LVC and LV Low-Voltage CMOS Logic Data Book (Rev. B) 18 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
Application note 16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B) 22 May 2002
Application note Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices 10 May 2002
More literature STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 27 Mar 2002
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note LVC Characterization Information 01 Dec 1996
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Design guide Low-Voltage Logic (LVC) Designer's Guide 01 Sep 1996
Application note Understanding Advanced Bus-Interface Products Design Guide 01 May 1996

Design & development

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Evaluation board

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Simulation model

HSPICE Model of SN74LVC1G3157

SCEJ160.ZIP (98 KB) - HSpice Model
Simulation model

SN74LVC1G3157 IBIS Model (Rev. B)

SCEM322B.ZIP (59 KB) - IBIS Model
Bill of materials (BOM)

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DSBGA (YZP) 6 View options
SC70 (DCK) 6 View options
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