SCES424O January   2003  – June 2025 SN74LVC1G3157

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  Thermal Information
    3. 5.3  ESD Ratings
    4. 5.4  Recommended Operating Conditions
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics 85C (DBV, DCK)
    7. 5.7  Switching Characteristics 125C (DBV, DCK)
    8. 5.8  Switching Characteristics 85C (YZP, DSF. DTB. DRY, DRL)
    9. 5.9  Switching Characteristics 125C (YZP, DSF. DTB. DRY, DRL)
    10. 5.10 Analog Channel Specifications
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  10. 9 Power Supply Recommendations
  11. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  12. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  13. 12Revision History
  14. 13Mechanical, Packaging, and Orderable Information

5.10 Analog Channel Specifications

over operating free-air temperature range (unless otherwise noted)
Parameter FROM (INPUT) TO (OUTPUT) TEST CONDITIONS vcc MIN NOM MAX UNIT
Frequency response (switch on)(1) A or Bn Bn or A RL = 50 Ω, fin = sine wave 1.65 V 340 MHz
2.3 V 340
3 V 340
4.5 V 340
Crosstalk (between switches)(2) B1 or B2 B2 or B1 RL = 50 Ω, fin = 10 MHz (sine wave) 1.65 V -54 dB
2.3 V -54
3 V -54
4.5 V -54
Feed through attenuation (switch off)(2) A or Bn Bn or A CL = 5 pF, RL = 50 Ω, fin = 10 MHz (sine wave) 1.65 V -57 dB
2.3 V -57
3 V -57
4.5 V -57
Charge injection S (Vs = VDD/2) A CL = 0.1 nF, RL = 1 MΩ 3.3 V 3 pC
5 V 7
Total harmonic distortion (YZP, DSF. DTB. DRY, DRL) A or Bn Bn or A VI = 1.4 Vp-p, Vbias = Vcc/2, RL = 10kΩ, fin = 600 Hz to 20kHz (sine wave) 1.65 V 0.1 %
Total harmonic distortion (DBV, DCK) A or Bn Bn or A VI = 1.4 Vp-p, Vbias = Vcc/2, RL = 10kΩ, fin = 600 Hz to 20kHz (sine wave) 1.65 V 0.5 %
Total harmonic distortion A or Bn Bn or A VI = 2.0 Vp-p, Vbias = Vcc/2, RL = 10kΩ, fin = 600 Hz to 20kHz (sine wave) 2.3 V 0.025 %
3 V 0.015
4.5 V 0.01
(1) Set fin to 0 dBm and provide a bias of 0.4 V. Increase fin frequency until the gain is 3 dB below the insertion loss.
(2) Set fin to 0 dBm and provide a bias of 0.4 V.