SCHS326A January   2003  – December 2024 CD54AC109 , CD74AC109

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Description
  4. 3 Pin Configuration and Functions
  5. 4 Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Thermal Information
    5. 4.5  Electrical Characteristics
    6. 4.6  Timing Requirements
    7. 4.7  Timing Requirements
    8. 4.8  Timing Requirements
    9. 4.9  Switching Characteristics
    10. 4.10 Switching Characteristics
    11. 4.11 Switching Characteristics
    12. 4.12 Operating Characteristics
  6. 5 Parameter Measurement Information
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
      2. 7.2.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Documentation Support
      1. 8.1.1 Related Documentation
    2. 8.2 Receiving Notification of Documentation Updates
    3. 8.3 Support Resources
    4. 8.4 Trademarks
    5. 8.5 Electrostatic Discharge Caution
    6. 8.6 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

4.7 Timing Requirements

over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted)
-55°C to 125°C -40°C to 85°C UNIT
MIN MAX MIN MAX
fclock Clock frequency 71 81 MHz
tW Pulse duration CLK high or low 7 6 ns
CLR or PRE low 6.3 5.5
tsu Setup time, before CLK↑ J or K 7.7 6.8 ns
th Hold time, after CLK↑ J or K 0 0 ns
trec Recovery time, before CLK↑ CLR ↑ or PRE↑ 3.5 3.1 ns