SDAA018 December   2025 MSPM0H3216

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 MSPM0H Hardware Design Check List
  5. 2 Power Supplies in MSPM0H Devices
    1. 2.1 Digital Power Supply
    2. 2.2 Analog Power Supply
    3. 2.3 Built-in Power Supply and Voltage Reference
    4. 2.4 Recommended Decoupling Circuit for Power Supply
  6. 3 Reset and Power Supply Supervisor
    1. 3.1 Digital Power Supply
    2. 3.2 Power Supply Supervisor
  7. 4 Clock System
    1. 4.1 Internal Oscillators
    2. 4.2 External Oscillators
    3. 4.3 External Clock Output (CLK_OUT)
    4. 4.4 Frequency Clock Counter (FCC)
  8. 5 Debugger
    1. 5.1 Debug Port Pins and Pinout
    2. 5.2 Debug Port Connection With Standard JTAG Connector
  9. 6 Key Analog Peripherals
    1. 6.1 ADC Design Considerations
  10. 7 Key Digital Peripherals
    1. 7.1 Timer Resources and Design Considerations
    2. 7.2 UART and LIN Resources and Design Considerations
    3. 7.3 I2C and SPI Design Considerations
  11. 8 GPIOs
    1. 8.1 GPIO Output Switching Speed and Load Capacitance
    2. 8.2 GPIO Current Sink and Source
    3. 8.3 High-Speed GPIOs (HSIO)
    4. 8.4 Communicate With a 1.8V/3.3V Device Without a Level Shifter
    5. 8.5 Unused Pins Connection
  12. 9 Layout Guides
    1. 9.1 Power Supply Layout
    2. 9.2 Considerations for Ground Layout
    3. 9.3 Traces, Vias, and Other PCB Components
    4. 9.4 How to Select Board Layers and Recommended Stack-up
  13. 10Summary
  14. 11References

2.3 Built-in Power Supply and Voltage Reference

The VREF module for the MSPM0H family is a shared voltage reference module that can be leveraged by a variety on on-board analog peripherals.

The VREF module features include:

  • 4V user-selectable internal references.
  • Support for receiving external reference on the VREF+ and VREF- device pins.
  • Sample and hold mode support VREF operation down to STANDBY operating mode.
  • Internal reference supports for ADC.

When supplying the MCU with an external reference, TI recommends connecting a decoupling capacitor on the reference pins with a value based on the voltage source (see Figure 2-1).

VREF Circuit Figure 2-1 VREF Circuit