SDAA018 December   2025 MSPM0H3216

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 MSPM0H Hardware Design Check List
  5. 2 Power Supplies in MSPM0H Devices
    1. 2.1 Digital Power Supply
    2. 2.2 Analog Power Supply
    3. 2.3 Built-in Power Supply and Voltage Reference
    4. 2.4 Recommended Decoupling Circuit for Power Supply
  6. 3 Reset and Power Supply Supervisor
    1. 3.1 Digital Power Supply
    2. 3.2 Power Supply Supervisor
  7. 4 Clock System
    1. 4.1 Internal Oscillators
    2. 4.2 External Oscillators
    3. 4.3 External Clock Output (CLK_OUT)
    4. 4.4 Frequency Clock Counter (FCC)
  8. 5 Debugger
    1. 5.1 Debug Port Pins and Pinout
    2. 5.2 Debug Port Connection With Standard JTAG Connector
  9. 6 Key Analog Peripherals
    1. 6.1 ADC Design Considerations
  10. 7 Key Digital Peripherals
    1. 7.1 Timer Resources and Design Considerations
    2. 7.2 UART and LIN Resources and Design Considerations
    3. 7.3 I2C and SPI Design Considerations
  11. 8 GPIOs
    1. 8.1 GPIO Output Switching Speed and Load Capacitance
    2. 8.2 GPIO Current Sink and Source
    3. 8.3 High-Speed GPIOs (HSIO)
    4. 8.4 Communicate With a 1.8V/3.3V Device Without a Level Shifter
    5. 8.5 Unused Pins Connection
  12. 9 Layout Guides
    1. 9.1 Power Supply Layout
    2. 9.2 Considerations for Ground Layout
    3. 9.3 Traces, Vias, and Other PCB Components
    4. 9.4 How to Select Board Layers and Recommended Stack-up
  13. 10Summary
  14. 11References

2 Power Supplies in MSPM0H Devices

Power is supplied to the device through the VDD and VSS connections. The device supports operation with a supply voltage of 4.5V to 5.5V and can start with a 4.5V supply. The power management unit (PMU) generates the regulated core supplies for the device and provides supervision of the external supply. This also contains a bandgap voltage reference used by the PMU and other analog peripherals. VDD is used directly to provide the IO supply (VDDIO) and the analog supply (VDDA). VDDIO and VDDA are internally connected to VDD so that additional power supply pins are not required (see the device data sheet for details).