SDAA067 August 2025 DP83826AE , DP83826AI , DP83826E , DP83826I
Table 2-2 and Figure 2-1 list the DP83826x FLD detection mode configuration. Note when Strap7 = High, Strap1 = High/Low, and Strap 8 = High/Low, the MLT3 Error Count is disabled.
| Strap Configuration | RX Error Count | MLT3 Error Count | Low SNR Threshold | Signal/Energy Loss | Descrambler Link Loss |
|---|---|---|---|---|---|
| (Default) Strap7 = LOW Strap1 = X Strap8 = X |
Disabled | Disabled | Disabled | Disabled | Disabled |
| Strap7 = HIGH Strap1 = HIGH Strap8 = LOW |
Enabled | Enabled | Enabled | Enabled | |
| Strap7 = HIGH Strap1 = LOW Strap8 = LOW |
Enabled | Disabled | Enabled | Disabled | |
| Strap7 = HIGH Strap1 = LOW Strap8 = HIGH |
Enabled | Disabled | Disabled | Disabled |
Table 2-3 and Figure 2-2 list the DP83826Ax FLD Detection Mode configuration. Note under the same strap configuration, the MLT3 Error Count is enabled. For DP83826x and DP83826Ax, the RX error count is enabled in both cases. With the RX Error being a superset of MLT-3 Error, the superset is triggered before MLT-3 error. So even though there is a configuration difference in the MLT-3 error count, there is no behavioral difference between DP83826x and DP83826Ax.
| FLD Strap Option | Strap Configuration | RX Error Count(1) | MLT3 Error Count | Low SNR Threshold | Signal/Energy Loss(1)(2) | Descrambler Link Loss |
|---|---|---|---|---|---|---|
| 1 | Strap1 = X Strap8 = X Strap11 = X |
Disabled | Disabled | Disabled | Disabled | Disabled |
| 2 | Strap7 = HIGH Strap1 = HIGH Strap8 = LOW Strap11 = LOW |
Enabled | Enabled | Enabled | Enabled | Enabled |
| 3 (3) | Strap7 = HIGH Strap1= LOW Strap8= LOW Strap11 = LOW |
Enabled | Enabled | Disabled | Enabled | Disabled |
| 4(3) | Strap7 = HIGH Strap1 = LOW Strap8 = HIGH Strap11 = LOW |
Enabled | Enabled | Disabled | Disabled | Disabled |
| 5(3) | Strap7 = HIGH Strap1 = LOW Strap8 = HIGH Strap11 = HIGH |
Disabled | Disabled | Disabled | Enabled | Disabled |
| 6 | Strap7 = HIGH Strap1 = HIGH Strap8 = LOW Strap11 = HIGH |
Disabled | Disabled | Enabled | Enabled | Enabled |
For best EMC performance, TI recommends enabling the signal and energy loss FLD mode.
For both DP83826x and DP83826Ax, additional configuration can be programmed using the Control Register 3 (CR3, register address 0x000B). Bits[3:0] and bit[10] allow for various FLD conditions to be enabled.