SDAA075 October   2025 CC2340R5

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 CC2340R5
    2. 1.2 DRV8329A
    3. 1.3 BLDC Motor
  5. 2BLDC Hardware
    1. 2.1 Hardware Setup
      1. 2.1.1 DRV8329AEVM Settings
    2. 2.2 Connection Diagram
  6. 3Running the Example
    1. 3.1 Dependencies
    2. 3.2 Loading Firmware
    3. 3.3 Motor Connection Test
    4. 3.4 BLDC Motor Hall Sensored Trap Operation With Bluetooth® LE
      1. 3.4.1 SimpleLink™ Connect Phone Application
  7. 4Firmware Design
    1. 4.1 Code Flow Description
    2. 4.2 Customized TI Drivers
      1. 4.2.1 PWM
      2. 4.2.2 ADCBuf
      3. 4.2.3 Power
    3. 4.3 Application Events
    4. 4.4 Commutation Table
    5. 4.5 Motor Acceleration
    6. 4.6 ADC Operations
    7. 4.7 Spin Detect Feature
    8. 4.8 Reporting Statistics
    9. 4.9 Bluetooth® LE Stack
  8. 5Tests and Results
  9. 6Summary
  10. 7References

ADCBuf

The default ADCBuf operates on a single channel in repeated single mode. Since two continuous channel conversions are warranted for this application, current (ISEN) and voltage (VSENPVDD), a repeated sequence mode is preferable. ADCBufLPF3.c is, therefore, also configured to transfer data through the ADC peripheral's FIFO instead of a single memory register.

The original TI Driver also chooses to begin subsequent ADC conversions automatically. This is not a good choice for the purposes of the motor design which must measure current halfway through a PWM duty cycle. Therefore, the ADC is set to trigger conversions of the first ADC channel (ISEN) upon the LGPT of the PWM TI Driver reaching the target value in up or down mode. The next ADC channel (VSENPVDD) is measured immediately afterward, and the process continues until the buffer is filled.

The ADCBuf callback operation also includes status processing for the high, in, low interrupts of the window monitor which is initialized in the app_bldc_motor_control.c file. This way, the application is notified of either a window monitor change or completed ADC buffer through DMA.