SDAA075 October   2025 CC2340R5

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1. 1.1 CC2340R5
    2. 1.2 DRV8329A
    3. 1.3 BLDC Motor
  5. 2BLDC Hardware
    1. 2.1 Hardware Setup
      1. 2.1.1 DRV8329AEVM Settings
    2. 2.2 Connection Diagram
  6. 3Running the Example
    1. 3.1 Dependencies
    2. 3.2 Loading Firmware
    3. 3.3 Motor Connection Test
    4. 3.4 BLDC Motor Hall Sensored Trap Operation With Bluetooth® LE
      1. 3.4.1 SimpleLink™ Connect Phone Application
  7. 4Firmware Design
    1. 4.1 Code Flow Description
    2. 4.2 Customized TI Drivers
      1. 4.2.1 PWM
      2. 4.2.2 ADCBuf
      3. 4.2.3 Power
    3. 4.3 Application Events
    4. 4.4 Commutation Table
    5. 4.5 Motor Acceleration
    6. 4.6 ADC Operations
    7. 4.7 Spin Detect Feature
    8. 4.8 Reporting Statistics
    9. 4.9 Bluetooth® LE Stack
  8. 5Tests and Results
  9. 6Summary
  10. 7References

4.2.1 PWM

The PWM TI Driver is originally designed to drive just one channel output from a timer in up mode. For the purposes of the BLDC motor, PWMTimerLPF3.c has been modified to drive all three channel outputs (representing the three motor phases) from a single timer. The driver also utilizes up or down mode as is important for triggering motor current measurements halfway through a duty cycle. The PWM_PERIOD (20kHz after dividing by two for up or down mode) is a typical PWM frequency when driving BLDC motors and TI does not recommend to change this value unless acutely familiar with the motor design.