SDAA081 September   2025 DP83825I

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Troubleshooting the Application
    1. 2.1 Schematic Checklist
    2. 2.2 Device Health Checks
      1. 2.2.1 Voltage Checks
      2. 2.2.2 Probe the RESET_N Signal
      3. 2.2.3 Probe RBIAS
      4. 2.2.4 Probe the XI Clock
      5. 2.2.5 Probe the Strap Pins During Initialization
      6. 2.2.6 Probe the Serial Management Interface (MDC, MDIO)
        1. 2.2.6.1 Read and Check Register Values
    3. 2.3 MDI Health Checks
      1. 2.3.1 Magnetics
      2. 2.3.2 Probe the MDI Signals
      3. 2.3.3 Check the Link Quality
      4. 2.3.4 Compliance
    4. 2.4 RMII Health Check
    5. 2.5 Loopback and PRBS
      1. 2.5.1 Loopback Modes
      2. 2.5.2 Transmitting and Receiving Packets with the MAC
      3. 2.5.3 Transmitting and Receiving Packets with BIST
  6. 3Summary
  7. 4References

2.5.1 Loopback Modes

There are several options for loopback that test and verify various functional blocks within the PHY. Enabling loopback mode allows in-circuit testing of the RMII and MDI data paths. DP83825 can be configured to one of the near-end (MII) loopback modes or to the reverse (MDI) loopback mode.

Loopback Modes Figure 2-14 Loopback Modes

MII loopback can be used to verify the MAC interface, while reverse loopback is used with a link partner to verify the data path along the MDI.

  • MII loopback is enabled by setting registers 0x0000[14] and 0x0016[2]
  • Reverse loopback is enabled by setting register 0x0016[4]